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Volumn , Issue , 2010, Pages 465-475

SWEL: Hardware cache coherence protocols to map shared data onto shared caches

Author keywords

cache coherence; shared memory

Indexed keywords

CACHE MEMORY; MEMORY ARCHITECTURE; MESSAGE PASSING; PARALLEL ARCHITECTURES;

EID: 78149276281     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1854273.1854331     Document Type: Conference Paper
Times cited : (44)

References (24)
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    • Brown, J.1    Kumar, R.2    Tullsen, D.3
  • 11
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    • An OS-based alternative to full hardware coherence on tiled CMPs
    • C. Fensch and M. Cintra. An OS-based alternative to full hardware coherence on tiled CMPs. In Proceedings of HPCA, 2008.
    • Proceedings of HPCA, 2008
    • Fensch, C.1    Cintra, M.2
  • 13
    • 15044351762 scopus 로고    scopus 로고
    • Speculative Incoherent Cache Protocols
    • J. Huh, D. Burger, J. Chang, and G. S. Sohi. Speculative Incoherent Cache Protocols. IEEE Micro, 24(6):104-109, 2004.
    • (2004) IEEE Micro , vol.24 , Issue.6 , pp. 104-109
    • Huh, J.1    Burger, D.2    Chang, J.3    Sohi, G.S.4
  • 15
    • 78149260945 scopus 로고    scopus 로고
    • Better than the Two: Exceeding Private and Shared Caches via Two-Dimensional Page Coloring
    • L. Jin and S. Cho. Better than the Two: Exceeding Private and Shared Caches via Two-Dimensional Page Coloring. In Proceedings of CMP-MSI Workshop, 2007.
    • Proceedings of CMP-MSI Workshop, 2007
    • Jin, L.1    Cho, S.2
  • 16
    • 40349103382 scopus 로고    scopus 로고
    • An Adaptive, Non-Uniform Cache Structure for Wire-Dominated On-Chip Caches
    • C. Kim, D. Burger, and S. Keckler. An Adaptive, Non-Uniform Cache Structure for Wire-Dominated On-Chip Caches. In Proceedings of ASPLOS, 2002.
    • Proceedings of ASPLOS, 2002
    • Kim, C.1    Burger, D.2    Keckler, S.3
  • 17
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    • The SGI Origin: A ccNUMA Highly Scalable Server
    • June
    • J. Laudon and D. Lenoski. The SGI Origin: A ccNUMA Highly Scalable Server. In Proceedings of ISCA-24, pages 241-251, June 1997.
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    • Laudon, J.1    Lenoski, D.2
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    • Token Coherence: Decoupling Performance and Correctness
    • June
    • M. Martin, M. Hill, and D. Wood. Token Coherence: Decoupling Performance and Correctness. In Proceedings of ISCA, pages 182-193, June 2003.
    • (2003) Proceedings of ISCA , pp. 182-193
    • Martin, M.1    Hill, M.2    Wood, D.3
  • 21
    • 0024666552 scopus 로고    scopus 로고
    • A cache consistency protocol for multiprocessors with multistage networks
    • P. Stenström. A cache consistency protocol for multiprocessors with multistage networks. In Proceedings of ISCA, May 1989.
    • Proceedings of ISCA, May 1989
    • Stenström, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.