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Volumn , Issue , 2004, Pages 97-106

Coherence decoupling: Making use of incoherence

Author keywords

Coherence decoupling; Coherence misses; False sharing; Speculative cache lookup

Indexed keywords

COHERENCE DECOUPLING; COHERENCE MISSES; FALSE SHARING; SHARED MEMORY; SPECULATIVE CACHE LOOKUP (SCL);

EID: 12844268033     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (37)

References (44)
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    • May
    • M. Franklin and G. S. Sohi. ARB: A hardware mechanism for dynamic reordering of memory references. IEEE Transactions on Computers, 45(5):552-571, May 1996.
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    • Franklin, M.1    Sohi, G.S.2
  • 14
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    • 0029202473 scopus 로고
    • Dynamic self-invalidation: Reducing coherence overhead in shared-memory multiprocessors
    • June
    • A. R. Lebeck and D. A. Wood. Dynamic self-invalidation: Reducing coherence overhead in shared-memory multiprocessors. In Proceedings of the 22nd Int. Symp. on Computer Architecture, pages 48-59, June 1995.
    • (1995) Proceedings of the 22nd Int. Symp. on Computer Architecture , pp. 48-59
    • Lebeck, A.R.1    Wood, D.A.2
  • 31
    • 0029308655 scopus 로고
    • The potential of compile-time analysis to adapt the cache coherence enforcement strategy to the data sharing characteristics
    • May
    • F. Mounes-Toussi and D. J. Lilja. The potential of compile-time analysis to adapt the cache coherence enforcement strategy to the data sharing characteristics. IEEE Transactions on Parallel and Distributed Systems, 6(5):470-481, May 1995.
    • (1995) IEEE Transactions on Parallel and Distributed Systems , vol.6 , Issue.5 , pp. 470-481
    • Mounes-Toussi, F.1    Lilja, D.J.2
  • 40
    • 0025401087 scopus 로고
    • Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers
    • G. S. Sohi. Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers. IEEE Transaction of Computer, 39(3):349-359, 1990.
    • (1990) IEEE Transaction of Computer , vol.39 , Issue.3 , pp. 349-359
    • Sohi, G.S.1
  • 44
    • 0030129806 scopus 로고    scopus 로고
    • The MIPS R10000 superscalar microprocessor
    • Apr.
    • K. C. Yeager. The MIPS R10000 Superscalar Microprocessor. IEEE Micro, 16(2):28-40, Apr. 1996.
    • (1996) IEEE Micro , vol.16 , Issue.2 , pp. 28-40
    • Yeager, K.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.