Coverage metrics for verification of concurrent SystemC designs using mutation testing

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn , Issue , 2010, Pages 75-81

  Sen, Alper ^a   Abadir, Magdy S ^b  

^a BOGAZICI UNIVERSITY   (Turkey)

^b FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONCURRENT PROGRAM; CONCURRENT SYSTEMS; COVERAGE METRICS; DESIGN VERIFICATION; ELECTRONIC SYSTEM DESIGN; INDUSTRIAL DESIGN; MULTIPLE APPLICATIONS; MUTATION OPERATORS; MUTATION TESTING; QUALITY PROBLEMS; RTL DESIGNS; SEQUENTIAL PROGRAMS; SYSTEMC; SYSTEMC DESIGN; VERIFICATION TESTS;

COMPUTER SIMULATION LANGUAGES; COMPUTER SOFTWARE SELECTION AND EVALUATION; PRODUCT DESIGN; SOFTWARE TESTING; TECHNICAL PRESENTATIONS;

LOGIC DESIGN;

EID: 77958132516     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2010.5496659     Document Type: Conference Paper

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