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Volumn , Issue , 2010, Pages 143-144
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A 9.2-12GHz, 90nm digital fractional-N synthesizer with stochastic TDC calibration and -35/-41dBc integrated phase noise in the 5/2.5GHz bands
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Author keywords
802.11n; 802.16e; Digital PLL; Frequency synthesizer; TDC calibration and phase noise minimization
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Indexed keywords
802.11N;
802.16E;
90NM CMOS;
DIGITAL PLL;
FRACTIONAL-N SYNTHESIZER;
GHZ BAND;
MINIMIZATION ALGORITHMS;
TDC CALIBRATION AND PHASE NOISE MINIMIZATION;
TIME TO DIGITAL CONVERSION;
CALIBRATION;
FREQUENCY SYNTHESIZERS;
OPTIMIZATION;
PHASE NOISE;
STOCHASTIC SYSTEMS;
VLSI CIRCUITS;
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EID: 77958009478
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/VLSIC.2010.5560321 Document Type: Conference Paper |
Times cited : (18)
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References (6)
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