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Volumn 31, Issue 9, 2010, Pages

Two-dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor

Author keywords

CMOS image sensor; Doping dose; Image lag; Implant tilt; Two dimensional simulation

Indexed keywords

CMOS IMAGE SENSOR; DOPING DOSE; IMAGE LAG; IMPLANT TILT; TWO-DIMENSIONAL SIMULATIONS;

EID: 77957865153     PISSN: 16744926     EISSN: None     Source Type: Journal    
DOI: 10.1088/1674-4926/31/9/094011     Document Type: Article
Times cited : (16)

References (13)
  • 4
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    • Sensitivity of CMOS based imagers and scaling perspectives
    • Lule T, Benthien S, Keller H, et al. Sensitivity of CMOS based imagers and scaling perspectives. IEEE Trans Electronic Devices, 2000, 47(11): 2110
    • (2000) IEEE Trans Electronic Devices , vol.47 , Issue.11 , pp. 2110
    • Lule, T.1    Benthien, S.2    Keller, H.3
  • 7
    • 0036564306 scopus 로고    scopus 로고
    • A numerical analysis of a CMOS image sensor with a simple fixed-pattern-noise-reduction technology
    • Yonemoto K, Sumi H. A numerical analysis of a CMOS image sensor with a simple fixed-pattern-noise-reduction technology. IEEE Trans Electron Devices, 2002, 49(5): 746
    • (2002) IEEE Trans Electron Devices , vol.49 , Issue.5 , pp. 746
    • Yonemoto, K.1    Sumi, H.2
  • 8
    • 0042879498 scopus 로고    scopus 로고
    • 4-μm pixel CMOS image sensor with low-image lag and high-temperature operability
    • Endo Y, Nitta Y, Kubo H, et al. 4-μm pixel CMOS image sensor with low-image lag and high-temperature operability. Proc SPIE, 2003, 5017(3): 196
    • (2003) Proc SPIE , vol.5017 , Issue.3 , pp. 196
    • Endo, Y.1    Nitta, Y.2    Kubo, H.3
  • 9
    • 0037247727 scopus 로고    scopus 로고
    • Low-leakage-current and low-operating-voltage buried photodiode for a CMOS imager
    • Inoue I, Tanaka N, Yamashita H, et al. Low-leakage-current and low-operating-voltage buried photodiode for a CMOS imager. IEEE Trans Electron Devices, 2003, 50(1): 43
    • (2003) IEEE Trans Electron Devices , vol.50 , Issue.1 , pp. 43
    • Inoue, I.1    Tanaka, N.2    Yamashita, H.3
  • 10
    • 0034481986 scopus 로고    scopus 로고
    • A CMOS image sensor with a simple fixed-pattern-noise-reduction technology and a hole accumulation diode
    • Yonemoto K, Sumi H. A CMOS image sensor with a simple fixed-pattern-noise-reduction technology and a hole accumulation diode. IEEE J Solid-State Circuits, 2000, 35(12): 2038
    • (2000) IEEE J Solid-State Circuits , vol.35 , Issue.12 , pp. 2038
    • Yonemoto, K.1    Sumi, H.2
  • 11
    • 0020293033 scopus 로고
    • No image lag photodiode structure in the interline CCD image sensor
    • Teranishi N, Kohono N, Ishihara A, et al. No image lag photodiode structure in the interline CCD image sensor. IEDM Tech Dig, 1982: 324
    • (1982) IEDM Tech Dig , pp. 324
    • Teranishi, N.1    Kohono, N.2    Ishihara, A.3
  • 13
    • 0021640137 scopus 로고
    • The pinned photodiode for an interline-transfer CCD image sensor
    • Burkey B C, Chang W C, Littlehale J, et al. The pinned photodiode for an interline-transfer CCD image sensor. Electron Devices Meeting, 1984, 30: 28
    • (1984) Electron Devices Meeting , vol.30 , pp. 28
    • Burkey, B.C.1    Chang, W.C.2    Littlehale, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.