4-micron pixel CMOS image sensor with low image lag and high-temperature operability

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5017, Issue , 2003, Pages 196-204

  Endo, Yasuyuki ^a   Nitta, Yoshikazu ^a   Kubo, Hiroshi ^a   Murao, Takeshi ^b   Shimomura, Ken'ichi ^a   Kimura, Masatoshi ^a   Watanabe, Kenji ^b   Yamamoto, Satoshi ^a   Komori, Shinji ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b LTEC Corporation   (Japan)

Author keywords

Black level automatically control; Charge transfer; CMOS image sensor; Gate through implantation; High temperature operability; Image lag

Indexed keywords

AMPLIFIERS (ELECTRONIC); CHARGE TRANSFER; CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); HIGH TEMPERATURE EFFECTS; IMAGE CONVERTERS; IMAGE QUALITY; MICROLENSES; PHOTODIODES;

POWER CONSUMPTION;

IMAGE SENSORS;

EID: 0042879498     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.482802     Document Type: Conference Paper

References (2)

1. K. Yonemoto and H. Sumi, "A CMOS Image Sensor with a Simple Fixed-Pattern-Noise-Reduction Technology and a Hole Accumulation Diode", IEEE J. Solid-State Circuits, vol. 35, pp. 2038-2043, 2000
2. I. Inoue et al., "New LV-BPD(Low Voltage Buried Photo-Diode) for CMOS Imager", in IEDM Dig., 1999, pp883-886