Miniature monolithic rectilinear ion trap arrays by stereolithography on printed circuit board

Journal of Microelectromechanical Systems

Volumn 19, Issue 4, 2010, Pages 951-960

  Maas, Jeffrey Daniel ^a   Hendricks, Paul Isaac ^b   Ouyang, Zheng ^c   Cooks, R Graham ^b   Chappell, William Johnson ^a  

^a Purdue University   (United States)

^b PURDUE UNIVERSITY   (United States)

^c PURDUE UNIVERSITY   (United States)

Author keywords

3 D isolation; Mass spectrometer; monolithic; rectilinear ion trap (RIT); stereolithography

Indexed keywords

CIRCUIT BOARDS; DESIGN IMPROVEMENTS; ELECTRONIC PACKAGING MATERIAL; FABRICATION PROCESS; INTEGRATED SENSOR SYSTEM; INTEGRATION PLATFORM; ION TRAPS; ISOLATION TECHNIQUES; MASS ANALYZERS; MONOLITHIC; MONOLITHIC ARRAYS; MONOLITHIC STRUCTURES; MULTILAYER SUBSTRATE; OPERATING VOLTAGE; RECTILINEAR ION TRAP; RIGID SUBSTRATES; SIZE REDUCTIONS; STORAGE VOLUMES;

CHIP SCALE PACKAGES; INTEGRATION; IONS; MASS SPECTROMETERS; MASS SPECTROMETRY; PACKAGING MATERIALS; PRINTED CIRCUIT MANUFACTURE; RIGID STRUCTURES; STEREOLITHOGRAPHY; SUBSTRATES; THREE DIMENSIONAL;

PRINTED CIRCUIT BOARDS;

EID: 77955415648     PISSN: 10577157     EISSN: None     Source Type: Journal    
DOI: 10.1109/JMEMS.2010.2048554     Document Type: Article

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