Low-impedance evaluation of power distribution network for decoupling capacitor embedded interposers of 3-D integrated LSI system

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2010, Pages 1455-1460

  Kikuchi, Katsuya ^a   Ueda, Chihiro ^b   Takemura, Koichi ^c   Shimada, Osamu ^c   Gomyo, Toshio ^c   Takeuchi, Yukiharu ^c   Ookubo, Toshikazu ^c   Baba, Kazuhiro ^c   Aoyagi, Masahiro ^a   Sudo, Toshio ^d   Otsuka, Kanji ^b  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b MEISEI UNIVERSITY   (Japan)

^c ASSOCIATION OF SUPER ADVANCED ELECTRONICS TECHNOLOGIES ASET   (Japan)

^d SHIBAURA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP CAPACITOR; DECOUPLING CAPACITOR; ELECTROMAGNETIC FIELD SIMULATORS; IMPEDANCE ANALYZER; LOW IMPEDANCE; MEASUREMENT RESULTS; POWER DISTRIBUTION NETWORK; TEST ELEMENT GROUPS; THIN-FILM CAPACITORS; WIDE FREQUENCY RANGE;

CAPACITANCE; DISTRIBUTED PARAMETER NETWORKS; ELECTRIC CONVERTERS; ELECTRIC NETWORK ANALYSIS; ELECTROMAGNETIC FIELDS; FINITE ELEMENT METHOD; FUZZY CONTROL; SEMICONDUCTING SILICON COMPOUNDS; THERMOELECTRIC EQUIPMENT; THIN FILM CIRCUITS; THIN FILMS; THREE DIMENSIONAL; VAPOR DEPOSITION;

CAPACITORS;

EID: 77955225775     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2010.5490807     Document Type: Conference Paper

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