The effects of underfill and its material models on thermomechanical behaviors of flip chip package

International Symposium on Electronic Materials and Packaging, EMAP 2000

Volumn , Issue , 2000, Pages 232-239

  Cheng, Zhaonian ^a   Chen, Liu ^a   Wang, Guozhong ^a   Xie, Xiaoming ^a   Zhang, Qun ^a  

^a DaimlerChrysler SIM Technology Co Ltd   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ASPHALT PAVEMENTS; CHIP SCALE PACKAGES; CRACKS; DELAMINATION; ELASTICITY; ELECTRONICS PACKAGING; FAILURE (MECHANICAL); FATIGUE OF MATERIALS; FLIP CHIP DEVICES; MATERIALS PROPERTIES; METALLOGRAPHY; MODIFIED ATMOSPHERE PACKAGING; PACKAGING; PLASTIC DEFORMATION; SOLDERED JOINTS; THERMAL FATIGUE;

EFFECTS OF MATERIALS; ELECTRICAL DETECTION; FINITE ELEMENT SIMULATIONS; METALLOGRAPHIC ANALYSIS; PLASTIC STRAIN RANGE; TEMPERATURE DEPENDENT; THERMAL FATIGUE CRACKS; THERMO-MECHANICAL BEHAVIORS;

FINITE ELEMENT METHOD;

EID: 77955178970     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EMAP.2000.904160     Document Type: Conference Paper

References (18)

1. E. Suhir, "The Future of Microelectronics and Photonics and the Role of Mechanics and Materials", ASME, J. Electron. Packag., vol. 120, pp. 1-11, 1998.
2. J. H. Lau, "Solder Joint Reliability of Flip Chip and Plastic Ball Grid Array Assemblies Under Thermal, Mechanical, and Vibrational Conditions", IEEE Trans. Comp., Packag., Manufact. Technol., vol. 19, pp. 728-735,1996.
3. K. Doi, N. Hirano, T. Okada, Y. Hiruta, and T. Sudo, "Prediction of Thermal Fatigue Life for Encapsulated Flip-Chip Interconnection", The International Journal of Microcircuits and Electronic Packaging, vol. 19, pp. 231-237, 1996.
4. J. B. Nysather, P. Lundström, and J. Liu, " Measurements of Solder Bump Lifetime as a Function of Underfill Material Properties", IEEE Trans. Comp., Packag., Manufact. Technol., vol. 21, pp. 281-287, 1998.
5. V. Gektin, A. Bar-Cohen, and J. Ames, "Coffin-Manson Fatigue Model of Underfilled Flip-Chip", IEEE Trans. Comp., Packag., Manufact. Technol., vol. 20, pp. 317-325, 1997.
6. E. Madenci, S. Shkarayev, and R. Mahajan, "Potential Failure Sites in a Flip Chip Package With and Without Underfill", ASME, J. Electron. Packag., vol. 120, pp. 336-341, 1998.
7. S. Rzepka, M. A. Korhonen, E. Meusel, C.-Y. Li, "the Effect of Underfill and Underfill Delamination on the Thermal Stress in Flip-Chip Solder Joints", ASME, J. Electron. Packag., vol. 120, pp. 342-348, 1998.
8. V. H. Kenner, B. D. Harper, and V. Y. Itkin, "Stress Relaxation in Molding Compounds", J. Electron. Materials, vol. 26, pp. 821-826, 1997.
9. Z. Qian, J. Wang, J. Yang, and S. Liu, "Visco-Elastic-Plastic Properties and Constitutive Modeling of Underfills", IEEE Trans. Comp., Packag., Manufact. Technol, vol. 22, pp. 152-157, 1999.
10. T. S. Yeung and M. M. F. Yuen, "Viscoelastic Analysis of IC Package Warpage", Sensing, Modeling and Simulation in Emerging Electronic Packaging, ASME, vol. 17, pp. 101-107, 1996.
11. O. S. Narayanaswamy, "A Model of Structural Relaxation in Glass", J. American Ceramic Society, vol. 54, pp. 491-498,1971.
12. R. G. Gardon and O. S. Narayanaswamy, "Stress and Volume Relaxation in Annealing Flat Glass", J. American Ceramic Society, vol. 53, pp.380-385, 1970.
13. J. Wilde, Z. N. Cheng, and G. Z. Wang, "Influences of Packaging Materials on Solder Joint Reliability of Chip Scale Package Assemblies ", in Proc. 1999 Intern. Symp. on Advanced Packaging Materials, Braselton, Georgia, March 14-17,1999, pp.144-149.
14. G.Z.Wang, Z.N. Cheng, J.Wilde and K. Becker, Applying Anand Model to Represent the Viscoplastic Deformation Behavior of Tin-Lead Solder Alloys, ASME J. Electronic Packaging (accepted)
15. H. D. Solomon, "Fatigue of 60/40 Solder", IEEE Trans., Comp., Hybrids, Manufact. Technol., vol. 9, pp. 423-432, 1989.
16. W. Engelmaier, "Fatigue Life of Leadless Chip Carrier Solder Joints During Power Cycling", IEEE Trans. Comp., Hybrids, Manufact. Technol., vol. 6, pp. 232-237,1983.
17. W. Engelmaier, "Solder Attachment Reliability Accelerated Testing, and Result Evaluation", Solder Joint Reliability: Theory and Applications, pp.568, 1991.
18. P. Prema et al., "Correlation of Flip Chip Underfill Process Parameters and Material Properties with In-Process Stress Generation", IEEE trans, on CHMP., vol.22, no. 1,pp. 53-62,1999.