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Volumn 6067 LNCS, Issue PART 1, 2010, Pages 80-86

Application specific processors for the autoregressive signal analysis

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE LATTICE FILTER; APPLICATION SPECIFIC PROCESSORS; AUTO-REGRESSIVE; AUTOREGRESSIVE SIGNALS; FLOATING-POINT CALCULATIONS; NEW OPPORTUNITIES; RATIONAL FRACTION; REAL TIME SIGNAL; SAMPLING FREQUENCIES; WIRELESS COMMUNICATIONS;

EID: 77955123303     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-14390-8_9     Document Type: Conference Paper
Times cited : (3)

References (10)
  • 3
    • 84947572014 scopus 로고    scopus 로고
    • Implementation of Givens QR Decomposition inFPGA
    • Wyrzykowski, R., Dongarra, J., Paprzycki, M., Wásniewski, J. (eds.) PPAM 2001, Springer, Heidelberg
    • Sergyienko, A., Maslennikow, O.: Implementation of Givens QR Decomposition inFPGA. In: Wyrzykowski, R., Dongarra, J., Paprzycki, M., Wásniewski, J. (eds.) PPAM 2001. LNCS, vol.2328, pp. 453-459. Springer, Heidelberg (2002)
    • (2002) LNCS , vol.2328 , pp. 453-459
    • Sergyienko, A.1    Maslennikow, O.2
  • 4
    • 33745776481 scopus 로고    scopus 로고
    • FPGA implementation of the conjugate gradient method
    • Wyrzykowski, R., Dongarra, J., Meyer, N., Wásniewski, J. (eds.) PPAM 2005, Springer, Heidelberg
    • Sergyienko, A., Maslennikow, O., Lepekha, V.: FPGA Implementation of the Conjugate Gradient Method. In: Wyrzykowski, R., Dongarra, J., Meyer, N., Wásniewski, J. (eds.) PPAM 2005. LNCS, vol.3911, pp. 526-533. Springer, Heidelberg (2006)
    • (2006) LNCS , vol.3911 , pp. 526-533
    • Sergyienko, A.1    Maslennikow, O.2    Lepekha, V.3
  • 5
    • 34547254777 scopus 로고    scopus 로고
    • High performance, low latency FPGA based floating point adder and multiplier units in a Virtex4
    • Link̈oping, Sweden, November 20-21
    • Karlstr̈om, P., Ehliar, A., Liu, D.: High performance, low latency FPGA based floating point adder and multiplier units in a Virtex4. In: 24th IEEE Norchip Conf., Link̈oping, Sweden, November 20-21, pp. 31-34 (2006)
    • (2006) 24th IEEE Norchip Conf. , pp. 31-34
    • Karlstr̈om, P.1    Ehliar, A.2    Liu, D.3
  • 8
    • 77955108284 scopus 로고    scopus 로고
    • A novel FPGA design of a high throughput rate adaptive prediction error filter
    • Hwang, Y.T., Han, J.C.: A novel FPGA design of a high throughput rate adaptive prediction error filter. In: 1st IEEE Asia Pacific Conf. on ASICs, AP-ASIC 1999, pp. 202-205 (1999)
    • (1999) 1st IEEE Asia Pacific Conf. on ASICs, AP-ASIC 1999 , pp. 202-205
    • Hwang, Y.T.1    Han, J.C.2
  • 9
    • 77955122270 scopus 로고    scopus 로고
    • Feasibility of fixed-point transversal adaptive filters in FPGA devices with embedded DSP blocks
    • Lin, A.Y., Gugel, K.S.: Feasibility of fixed-point transversal adaptive filters in FPGA devices with embedded DSP blocks. In: 3rd IEEE IWSOC 2003, pp. 157- 160 (2003)
    • (2003) 3rd IEEE IWSOCs 2003 , pp. 157-160
    • Lin, A.Y.1    Gugel, K.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.