Feasibility of fixed-point transversal adaptive filters in FPGA devices with embedded DSP blocks

Proceedings - 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2003

Volumn , Issue , 2003, Pages 157-160

  Lin, A Y ^a   Gugel, K S ^a   Principe J C ^a  

^a UNIVERSITY OF FLORIDA   (United States)

Author keywords

Adaptive algorithm; Adaptive filters; Adaptive signal processing; Convergence; Digital signal processing; Field programmable gate arrays; Fixed point arithmetic; Floating point arithmetic; Least squares approximation; Signal processing algorithms

Indexed keywords

ADAPTIVE ALGORITHMS; ADAPTIVE FILTERING; ADAPTIVE FILTERS; ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; APPROXIMATION ALGORITHMS; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; DIGITAL SIGNAL PROCESSORS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LEAST SQUARES APPROXIMATIONS; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; SIGNAL PROCESSING; TRANSVERSAL FILTERS;

ADAPTIVE SIGNAL PROCESSING; CONVERGENCE; DSP PROCESSOR; FPGA DEVICES; LMS ALGORITHMS; SIGNAL PROCESSING ALGORITHMS; STRATIX DEVICES; TRANSVERSAL ADAPTIVE FILTERS;

FIXED POINT ARITHMETIC;

EID: 77955122270     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWSOC.2003.1213026     Document Type: Conference Paper

References (5)

1. Altera, Stratix Programmable Logic Device Family Data Sheet, Data Sheet DS-STXFAMLY-2.1, Altera, Inc., August, 2002
2. Chew, W.C., Farhang-Boroujeny, B., FPGA Implementation of Acoustic Echo Cancelling. TENCON 1999. Proceedings of the IEEE Region 10 Conference, Volume: 1, pp. 263-266.
3. FU, R. FORTIER, P, VLSI Implementation of Parallel-Serial LMS Adaptive Filters, 18th Biennial Symposium on Communications, Kingston, June 1996, pp. 159-162.
4. th edition, Prentice Hall, New Jersey, 2002.
5. th International Conference on Computer Applications in Industry and Engineering, November 2002.