A novel FPGA design of a high throughput rate adaptive prediction error filter

AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Volumn , Issue , 1999, Pages 202-205

  Hwang, Yin Tsung ^a   Han, Jih Cheng ^a  

^a NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 77955108284     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824063     Document Type: Conference Paper

References (8)

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