Implementation of givens QR-decomposition in FPGA

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2328, Issue , 2002, Pages 458-465

  Sergyienko, Anatoli ^a   Maslennikov, Oleg ^b  

^a NATIONAL TECHNICAL UNIVERSITY OF UKRAINE   (Ukraine)

^b KOSZALIN UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GRAPH ALGORITHMS; PARALLEL PROCESSING SYSTEMS;

AFFINE TRANSFORMATIONS; FPGA DEVICES; FPGA IMPLEMENTATIONS; HARDWARE UTILIZATION; PARALLEL PROCESSOR; PIPELINED PROCESSOR; QR-DECOMPOSITION; UNIT DESIGN;

PIPELINE PROCESSING SYSTEMS;

EID: 84947572014     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48086-2_50     Document Type: Conference Paper

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