High throughput maskless lithography: Low voltage versus high voltage

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6921, Issue , 2008, Pages

  Steenbrink, S W H K ^a   Kampherbeek, B J ^a   Wieland, M J ^a   Chen, J H ^b   Chang, S M ^b   Pas, M ^c   Kretz, J ^d   Hohle, C ^d   Van Steenwinckel, D ^e   Manakli, S ^f   Le Denmat, J ^f   Pain, L ^g  

^a MAPPER Lithography BV   (Netherlands)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^c TEXAS INSTRUMENTS   (United States)

^d QIMONDA DRESDEN GMBH AND CO OHG   (Germany)

^e NXP SEMICONDUCTORS   (Netherlands)

^f STMICROELECTRONICS   (France)

^g CEA LETI   (France)

Author keywords

E beam lithography; High throughput maskless lithography; Low voltage e beam high voltage e beam; Maskless lithography

Indexed keywords

BEAM ENERGIES; CD UNIFORMITY; DESIGN PARAMETERS; E-BEAM LITHOGRAPHY; HIGH CURRENTS; HIGH THROUGHPUT; HIGH VOLTAGE; HIGH-ENERGY ELECTRON; LITHOGRAPHY PROCESS; LOW ENERGIES; LOW ENERGY SYSTEM; LOW VOLTAGES; MASK-LESS LITHOGRAPHY; SINGLE BEAM; SMALL SPOTS; SPOT SIZES; WAFER HEATING;

ELECTRON BEAM LITHOGRAPHY; ELECTRON BEAMS;

THROUGHPUT;

EID: 77953301919     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.771971     Document Type: Conference Paper

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