A phase change memory as a secure main memory

IEEE Computer Architecture Letters

Volumn 9, Issue 1, 2010, Pages 5-8

  Seznec, Andre ^a  

^a INRIA   (France)

Author keywords

Memory Structures; Semiconductor Memories

Indexed keywords

ACCESS TIME; AVERAGE BEHAVIOR; CURRENT TECHNOLOGY; DRAM TECHNOLOGY; MAIN MEMORY; MALICIOUS ATTACK; MEMORY CELL; MEMORY STRUCTURE; MEMORY SYSTEMS; PHASE-CHANGE MEMORY TECHNOLOGIES; RESEARCH PROPOSALS; SEMICONDUCTOR MEMORY;

DYNAMIC RANDOM ACCESS STORAGE; SEMICONDUCTOR STORAGE; TECHNOLOGY;

PHASE CHANGE MEMORY;

EID: 77953288543     PISSN: 15566056     EISSN: None     Source Type: Journal    
DOI: 10.1109/L-CA.2010.2     Document Type: Article

References (7)

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