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Volumn 4168 LNCS, Issue , 2006, Pages 100-111

Competitive analysis of flash-memory algorithms

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DATA STORAGE EQUIPMENT; ONLINE SYSTEMS; PROBLEM SOLVING; STORAGE ALLOCATION (COMPUTER);

EID: 33750728910     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11841036_12     Document Type: Conference Paper
Times cited : (47)

References (13)
  • 1
    • 79953237511 scopus 로고
    • Flash memory mass storage architecture incorporation wear leveling technique
    • US patent 5,479,638, US patent 5,388,083 (slightly different title), and US patent 5,485,595 (slightly different title), all filed 1993, issued 1995/6, and assigned to Cirrus Logic
    • Mahmud Assar, Siamack Nemazie, and Petro Estakhri. Flash memory mass storage architecture incorporation wear leveling technique. US patent 5,479,638, US patent 5,388,083 (slightly different title), and US patent 5,485,595 (slightly different title), all filed 1993, issued 1995/6, and assigned to Cirrus Logic, 1993.
    • (1993)
    • Assar, M.1    Nemazie, S.2    Estakhri, P.3
  • 2
    • 33750685713 scopus 로고    scopus 로고
    • Wear leveling of static areas in flash memory
    • US patent 6,732,221, filed 2001, issued 2004, and assigned to M-Systems
    • Amir Ban. Wear leveling of static areas in flash memory. US patent 6,732,221, filed 2001, issued 2004, and assigned to M-Systems, 2001.
    • (2001)
    • Ban, A.1
  • 3
    • 84880234565 scopus 로고    scopus 로고
    • Master's thesis, School of Computer Science, Tel-Aviv University, April
    • Avraham Ben-Aroya. Competitive analysis of flash-memory algorithms. Master's thesis, School of Computer Science, Tel-Aviv University, April 2006. Available online at www.tau.ac.il/~abrhambe.
    • (2006) Competitive Analysis of Flash-memory Algorithms
    • Ben-Aroya, A.1
  • 4
    • 33750742517 scopus 로고    scopus 로고
    • Unified re-map and cache-index table with dual write-counters for wear-leveling of nonvolitile flash ram mass storage
    • US patent 6,000,006, December 1999. Filed August 25, 1997; Issued December 7, Assigned to BIT Microsystems
    • Ricardo H. Bruce, Ronaldo H. Bruce, Earl T. Cohen, and Allan J. Christie. Unified re-map and cache-index table with dual write-counters for wear-leveling of nonvolitile flash ram mass storage. US patent 6,000,006, December 1999. Filed August 25, 1997; Issued December 7, 1999; Assigned to BIT Microsystems.
    • (1999)
    • Bruce, R.H.1    Bruce, R.H.2    Cohen, E.T.3    Christie, A.J.4
  • 5
    • 0033359582 scopus 로고    scopus 로고
    • Cleaning policies in mobile computers using flash memory
    • M.-L. Chiang and R.-C. Chang. Cleaning policies in mobile computers using flash memory. The Journal of Systems and Software, 48(3):213-231, 1999.
    • (1999) The Journal of Systems and Software , vol.48 , Issue.3 , pp. 213-231
    • Chiang, M.-L.1    Chang, R.-C.2
  • 6
    • 0033101057 scopus 로고    scopus 로고
    • Using data clustering to improve cleaning performance for flash memory
    • Mei-Ling Chiang, Paul C.H. Lee, and Reui-Chuan Chang. Using data clustering to improve cleaning performance for flash memory. Software - Practice and Experience, 29(3), 1999.
    • (1999) Software - Practice and Experience , vol.29 , Issue.3
    • Chiang, M.-L.1    Lee, P.C.H.2    Chang, R.-C.3
  • 7
    • 33750707325 scopus 로고    scopus 로고
    • Method of and architecture for controlling system data with automatic wear leveling in a semiconductor non-volitile mass storage memory
    • US patent 5,835,935, 1998. Filed September 13, 1995; Issued November 10, Assigned to Lexar Media
    • Petro Estakhri, Mahmud Assar, Robert Reid, Alan, and Berhanu Iman. Method of and architecture for controlling system data with automatic wear leveling in a semiconductor non-volitile mass storage memory. US patent 5,835,935, 1998. Filed September 13, 1995; Issued November 10, 1998; Assigned to Lexar Media.
    • (1998)
    • Estakhri, P.1    Assar, M.2    Reid, R.3    Alan4    Iman, B.5
  • 8
    • 27344441029 scopus 로고    scopus 로고
    • Algorithms and data structures for flash memories
    • Eran Gal and Sivan Toledo. Algorithms and data structures for flash memories. ACM Computing Surveys, 37:138-163, 2005.
    • (2005) ACM Computing Surveys , vol.37 , pp. 138-163
    • Gal, E.1    Toledo, S.2
  • 9
    • 33750681738 scopus 로고    scopus 로고
    • Flash memory wear leveling system and method
    • US patent 6,016,275, January 2000. Filed November 4, 1998; Issued January 18, Assigned to LG Semiconductors
    • Sang-Wook Han. Flash memory wear leveling system and method. US patent 6,016,275, January 2000. Filed November 4, 1998; Issued January 18, 2000; Assigned to LG Semiconductors.
    • (2000)
    • Han, S.-W.1
  • 10
    • 33750728478 scopus 로고    scopus 로고
    • Flash memory wear leveling system providing immediate direct access to microprocessor
    • US patent 5,568,423, October 1996. Filed April 14, 1995; Issued October 22, Assigned to Unisys
    • Edwin Jou and James H. Jeppesen III. Flash memory wear leveling system providing immediate direct access to microprocessor. US patent 5,568,423, October 1996. Filed April 14, 1995; Issued October 22, 1996; Assigned to Unisys.
    • (1996)
    • Jou, E.1    Jeppesen III, J.H.2
  • 12
    • 67650091489 scopus 로고    scopus 로고
    • Wear leveling techniques for flash EEPROM systems
    • US patent 6,081,447 and US patent 6,594,183, filed 1998/1999, issued 2000/2003, and assigned to Western Digital and Sandisk
    • Karl M. J. Lofgren, Robert D. Norman, Gregory B. Thelin, and Anil Gupta. Wear leveling techniques for flash EEPROM systems. US patent 6,081,447 and US patent 6,594,183, filed 1998/1999, issued 2000/2003, and assigned to Western Digital and Sandisk, 1998.
    • (1998)
    • Lofgren, K.M.J.1    Norman, R.D.2    Thelin, G.B.3    Gupta, A.4
  • 13
    • 33750714846 scopus 로고
    • Method for wear leveling in a flash EEPROM memory
    • US patent 5,341,339, 1994. Filed November 1, 1993; Issued August 23, Assigned to Intel
    • Steven E. Wells. Method for wear leveling in a flash EEPROM memory. US patent 5,341,339, 1994. Filed November 1, 1993; Issued August 23, 1994; Assigned to Intel.
    • (1994)
    • Wells, S.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.