A low quiescent biased regulator with high PSR dedicated to micropower sensor circuits

IEEE Sensors Journal

Volumn 10, Issue 7, 2010, Pages 1266-1275

  Ong, G T ^a   Chan, P K ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Bandgap voltage regulator; Low power; Power supply rejection; Voltage regulator

Indexed keywords

BAND GAPS; BANDGAP VOLTAGE; CIRCUIT TECHNIQUES; CURRENT SOURCES; DRIVING DEVICE; FEEDBACK CONTROL LOOPS; FIGURE OF MERIT; FULL INTEGRATION; HIGH EFFICIENCY; HIGH-POWER; LOW POWER; MEASURED RESULTS; MICROPOWER; OFF-CHIP CAPACITORS; OUTPUT VOLTAGES; PERFORMANCE COMPARISON; POWER SUPPLY REJECTION; PROCESS TECHNOLOGIES; PSR BANDWIDTH; QUIESCENT CURRENTS; RESISTIVE LOADS; SENSOR CIRCUIT; SMALL SIZE; TEMPERATURE COEFFICIENT; TRIPLE WELL;

ARCHITECTURAL DESIGN; CAPACITANCE; CAPACITORS; COMPUTER SIMULATION; ELECTRIC CURRENT REGULATORS; ELECTRIC POTENTIAL; ENERGY GAP; SENSORS; VOLTAGE REGULATORS;

VOLTAGE CONTROL;

EID: 77952920609     PISSN: 1530437X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSEN.2009.2038793     Document Type: Article

References (34)

1. C. Falconi, E. Martinelli, C. Di Natale, A. D'Amico, F. Maloberti, P. Malcovati, A. Baschirotto, V. Stornelli, and G. Ferri, "Electronic interfaces," Sens. Actuators B, Chem., vol. 121, pp. 295-329, Jan. 2007.
2. A. C. W. Wong, D. McDonagh, G. Kathiresan, O. C. Omeni, O. El-Jamaly, T. C. K. Chan, P. Paddan, and A. J. Burdett, "A 1 V, micropower system-on-chip for vital-sign monitoring in wireless body sensor networks," in Proc. IEEE Solid-State Circuits Conf. (ISSCC), Feb. 2008, pp. 138-602.
3. M. Stordeur and I. Stark, "Low power thermoelectric generator-selfsufficient energy supply for micro systems," in Proc. ICT 16th Int. Conf. Thermoelectr., Aug. 1997, pp. 575-577.
4. C. Mathuna, T. O'Donnell, R. V. Martinez-Catala, J. Rohan, and B. O'Flynn, "Energy scavenging for long-term deployable wireless sensor networks," Talanta, vol. 75, pp. 613-623, May 2008.
5. D. Steingart, "Power sources for wireless sensor networks," in Energy Harvesting Technologies. New York: Springer-Verlag, 2009, pp. 267-286.
6. K. A. Ng and P. K. Chan, "A CMOS analog front end IC for portable EEG/ECG monitoring applications," IEEE Trans. Circuits Syst., vol. 52, no. 11, pp. 2335-2347, Nov. 2005.
7. C. Hierold, B. Clasbrummel, D. Behrend, T. Scheiter, M. Steger, K. Oppermann, H. Kapels, E. Landgraf, D. Wenzel, and D. Etzrodt, "Low power integrated pressure sensor system for medical applications," Sens. Actuators A, Phys., vol. 73, pp. 58-67, Mar. 1999.
8. Y. Li, H. Yu, B. Su, and Y. Shang, "Hybrid micropower source for wireless sensor network," IEEE Sensors J., vol. 8, no. 6, pp. 678-681, Jun. 2008.
9. T. Denison, W. Santa, G. Molnar, and K. Miesel, "Micropower sensors for neuroprosthetics," in Proc. IEEE Sens. Conf., Oct. 2007, pp. 1105-1108.
10. R. R. Harrison and C. Charles, "A low-power low-noise CMOS amplifier for neural recording applications," IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 958-965, Jun. 2003.
11. P. K. Chan, K. A. Ng, and X. L. Zhang, "A CMOS chopper-stabilized differential difference amplifier for biomedical integrated circuits," in Proc. IEEE Midwest Symp. Circuits Syst. (MWSCAS), Jul. 2004, pp. 33-36.
12. H. J. Oguey and D. Aebischer, "CMOS current reference without resistance," IEEE J. Solid-State Circuits, vol. 32, no. 7, pp. 1132-1135, Jul. 1997.
13. H.-W. Huang, C.-Y. Hsieh, K.-H. Chen, and S.-Y. Kuo, "A 1 V 16.9 ppm/K 250 nA switched-capacitor CMOS voltage reference," in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), Feb. 2008, pp. 438-626.
14. L. H. C. Ferreira, T. C. Pimenta, R. L. Moreno, and W. A. V. Noije, "Ultra low-voltage ultra low-power CMOS threshold voltage reference," in Proc. 19th Annu. Symp. Integr. Circuits Syst. Des., Aug. 2006, pp. 2044-2050.
15. K.-M. Tham and K. Nagaraj, "A low supply voltage high PSRR voltage reference in CMOS process," IEEE J. Solid-State Circuits, vol. 30, no. 5, pp. 586-590, May 1995.
16. K. N. Leung and P. K. T. Mok, "A CMOS voltage reference based on weighted δVGS for CMOS low-dropout linear regulators," IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 146-150, Jan. 2003.
17. K. N. Leung and P. K. T. Mok, "A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation," IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1691-1702, Oct. 2003.
18. K. N. Leung, P. K. T. Mok, and C. Y. Leung, "A 2-V 23 μ A 5.3-ppm/K curvature-compensated CMOS bandgap voltage reference," IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 561-564, Mar. 2003.
19. R. J. Milliken, J. Silva-Martinez, and E. Sanchez-Sinencio, "Full on-chip CMOS low-dropout voltage regulator," IEEE Trans. Circuits Syst. I, vol. 54, no. 9, pp. 1879-1890, Sep. 2007.
20. V. Gupta and G. A. Rincon-Mora, "A 5 mA 0.6 μm CMOS Millercompensated LDO regulator with -27 dB worst-case power-supply rejection using 60 pF of on-chip capacitance," in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), Feb. 2007, pp. 520-521.
21. V. Gupta, G. A. Rincon-Mora, and P. Raha, "Analysis and design of monolithic, high PSR, linear regulators for SoC applications," in Proc. IEEE Int. SOC Conf, Sep. 2004, pp. 311-315.
22. M. El-Nozahi, A. Amer, J. Torres, K. Entesari, and E. Sanchez-Sinencio, "A 25 mA 0.13 μm CMOS LDO regulator with power-supply rejection better than -56 dB up to 10 MHz using a feedforward ripple-cancellation technique," in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), Feb. 2009, pp. 330-331, 331a.
23. P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2nd ed. New York: Oxford Univ. Press, 2002, pp. 153-159.
24. B. S. Song and P. R. Gray, "A precision curvature-compensated CMOS bandgap reference," IEEE J. Solid-State Circuits, vol. SC-18, no. 6, pp. 634-643, Feb. 1983.
25. K. E. Kuijk, "A precision reference voltage source," IEEE J. Solid-State Circuits, vol. SC-8, no. 3, pp. 222-226, Jun. 1973.
26. V. Gupta and G. Rincón-Mora, "A low-impedance, sub-bandgap 0.6 μm CMOS reference with 0.84% trimless 3- σ accuracy and -30 dB worst-case PSRR up to 50 MHz," in Analog Integrated Circuits and Signal Processing. Dordrecht, The Netherlands: Kluwer, 2009.
27. R. J. Widlar, "New developments in IC voltage regulators," IEEE J. Solid-State Circuits, vol. SC-6, no. 1, pp. 2-7, Feb. 1971.
28. A. P. Brokaw, "A simple three-terminal IC bandgap reference," IEEE J. Solid-State Circuits, vol. SC-9, no. 12, pp. 388-393, Dec. 1974.
29. P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed. New York: Wiley, 2001, pp. 317-327, 488-512.
30. G. Giustolisi and G. Palumbo, "A detailed analysis of power-supply noise attenuation in bandgap voltage references," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl, vol. 50, no. 2, pp. 185-197, Feb. 2003.
31. C. Fiegna, "The effects of scaling on the performance of small-signal MOS amplifiers," Solid-State Electron., vol. 46, pp. 675-683, May 2002.
32. G. Giustolisi and G. Palumbo, "Detailed frequency analysis of power supply rejection in Brokaw bandgap," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), May 2001, pp. 731-734.
33. Y. P. Tsividis, "Accurate analysis of temperature effects in IC-VBE characteristics with application to bandgap reference sources," IEEE J. Solid-State Circuits, vol. SC-15, no. 6, pp. 1076-1084, Dec. 1980.
34. S. Mandal, S. Arfin, and R. Sarpeshkar, "Fast startup CMOS current references," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), May 2006, pp. 2844-2848.