A 1V 16.9ppm/°C 250nA switched-capacitor CMOS voltage reference

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 438-626

  Huang, Hong Wei ^a   Hsieh, Chun Yu ^b   Chen, Ke Horng ^b   Kuo, Sy Yen ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

HALL MOBILITY; HOLE MOBILITY; TEMPERATURE DISTRIBUTION; VOLTAGE MEASUREMENT;

CHANNEL LENGTH MODULATION; CMOS PROCESSS; CMOS VOLTAGE REFERENCE; DIE AREA; PRECISION-VOLTAGE REFERENCE; SWITCHED CAPACITOR; SWITCHED CAPACITOR TECHNIQUES; TEMPERATURE DEPENDENCE;

CMOS INTEGRATED CIRCUITS;

EID: 49549122232     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523245     Document Type: Conference Paper

References (4)

1. K. N. Leung and P. K. T. Mok, "A Sub-1-V 15ppm/°C CMOS Bandgap Voltage Reference Without Requiring Low Threshold Voltage Device," IEEE J. Solid-State Circuits, pp. 526-530, Apr. 2002.
2. GS for CMOS Low-Dropout Linear Regulators," IEEE J. Solid-State Circuits, pp. 146-150, Jan. 2003.
3. G. De Vita and G. Iannaccone, "A Sub-1-V, 10ppm/°C, Nanopower Voltage Reference Generator," IEEE J. Solid-State Circuits, pp. 1536-1542, July 2007.
4. B. K. Ahuja, H. Vu, C. Laber et al., "A 0.5μA Precision CMOS Floating-Gate Analog Reference," ISSCC Dig. Tech. Papers, pp. 286-287, 2005.