A low-power associative processor with the r-th nearest-match hamming-distance search engine employing time-domain techniques

Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010

Volumn , Issue , 2010, Pages 54-57

  Bui, Trong Tu ^a   Shibata, Tadashi ^b  

^a UNIVERSITY OF NATURAL SCIENCES   (Viet Nam)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

Associative processor; CAM; Hamming distance; ROF; Time domain techniques

Indexed keywords

ANALOG IMPLEMENTATION; ASSOCIATIVE PROCESSOR; CMOS PROCESSS; CORE SIZE; DELAY TIME; DIGITAL TECHNIQUES; LOCATION IDENTIFICATION; LOW POWER; POWER CONSUMPTION; PROOF OF CONCEPT; TIME-DOMAIN TECHNIQUE;

ASSOCIATIVE STORAGE; CAMS; CMOS INTEGRATED CIRCUITS; HAMMING DISTANCE; NANOTECHNOLOGY; SEARCH ENGINES;

TIME DOMAIN ANALYSIS;

EID: 77952407916     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DELTA.2010.37     Document Type: Conference Paper

References (7)

1. T. Ohmi and T. Shibata, "Functionality Enhancement in Elemental Device for Implementing Intelligence on Integrated Circuits," IEICE Trans Electronics, Vol. E. 80-C, No. 7, pp. 841-847, July 1997.
2. M. Fukuhara and M. Yoshida, "Power Consumption of a Hamming Distance Search Cam Using Neuron MOS Transistors," in Proceedings of 2006 IEEE International Symposium on Circuits and Systems, Island of Kos, 2006, pp. 21-24.
3. H. J. Mattausch, T. Gyohten, Y. Soda and T. Koide, "Compact Associative-Memory Architecture with Fully-Parallel Search Capability for the Minimum Hamming Distance," IEEE Journal of Solid-State Circuits, Vol. 37, pp. 218-227, Feb. 2002.
4. Y. Oike, M. Ikeda, and K. Asada, "A High-Speed and Low-Voltage Associative Co-Processor With Exact Hamming/Manhattan-Distance Estimation Using Word-Parallel and Hierarchical Search Architecture," Journal of Solid-State Circuits, Vol. 39, pp. 1383-1387 2004.
5. S. Nakahara and T. Kawata, "A Digital Circuit for a Minimum Distance Search Using an Asynchronous Bubble Shift Memory," Digest of Tech. Papers IEEE International Solid-State Circuits Conference (ISSCC 2004), San Francisco, pp. 504-505, 2004.
6. M. Ikeda and K. Asada, "Time-Domain Minimum-Distance Detector and Its Application to Low Power Coding Scheme On Chip Interface," in Proc. 24th European Solid-State Circuit Conf. (ESSCIRC 1998), The Hague, 1998, pp. 464-467.
7. L. T. Nguyen, K. Ito and T. Shibata, "Compact and Power-Efficient Implementation of Rank-Order Filters Using Time-Domain Digital Computation Technique," Japanese Journal of Applied Physics (JJAP), Vol. 47, Part 1, No. 4B, pp. 2807-2811, April 2008.