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Volumn , Issue , 2009, Pages
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Carrier profile designing to suppress systematic Vth variation related with device layout by controlling STI-enhanced dopant diffusions correlated with point defects
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Author keywords
[No Author keywords available]
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Indexed keywords
CARRIER-PROFILE;
CHANNEL DIRECTIONS;
DEVICE LAYOUT;
DOPANT DIFFUSION;
EDGE ROUGHNESS;
NMOSFET;
NMOSFETS;
SHALLOW TRENCH ISOLATION;
STI-INDUCED STRESS;
STRESS SIMULATIONS;
TRANSIENT ENHANCED DIFFUSION;
DEFECTS;
DIFFUSION;
ELECTRON DEVICES;
MOSFET DEVICES;
POINT DEFECTS;
RAMAN SPECTROSCOPY;
SEMICONDUCTING SILICON;
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EID: 77952349879
PISSN: 01631918
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/IEDM.2009.5424423 Document Type: Conference Paper |
Times cited : (3)
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References (10)
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