-
1
-
-
14644415558
-
SAT-based induction for temporal safety properties
-
Armoni, R., Fix, L., Fraer, R., Huddleston, S., Piterman, N., Vardi, M.Y.: SAT-based induction for temporal safety properties. Electr. Notes Theor. Comput. Sci. 119(2), 3-16 (2005)
-
(2005)
Electr. Notes Theor. Comput. Sci.
, vol.119
, Issue.2
, pp. 3-16
-
-
Armoni, R.1
Fix, L.2
Fraer, R.3
Huddleston, S.4
Piterman, N.5
Vardi, M.Y.6
-
2
-
-
35348951470
-
The software model checker Blast
-
Beyer, D., Henzinger, T.A., Jhala, R., Majumdar, R.: The software model checker Blast. STTT 9(5-6), 505-525 (2007)
-
(2007)
STTT
, vol.9
, Issue.5-6
, pp. 505-525
-
-
Beyer, D.1
Henzinger, T.A.2
Jhala, R.3
Majumdar, R.4
-
3
-
-
33847702424
-
Bounded model checking
-
Biere, A., Cimatti, A., Clarke, E.M., Strichman, O., Zhu, Y.: Bounded model checking. Advances in Computers 58, 118-149 (2003)
-
(2003)
Advances in Computers
, vol.58
, pp. 118-149
-
-
Biere, A.1
Cimatti, A.2
Clarke, E.M.3
Strichman, O.4
Zhu, Y.5
-
4
-
-
84947289900
-
SAT-based verification without state space traversal
-
Johnson, S.D., Hunt Jr., W.A. (eds.) FMCAD 2000. Springer, Heidelberg
-
Bjesse, P., Claessen, K.: SAT-based verification without state space traversal. In: Johnson, S.D., Hunt Jr., W.A. (eds.) FMCAD 2000. LNCS, vol. 1954, pp. 372-389. Springer, Heidelberg (2000)
-
(2000)
LNCS
, vol.1954
, pp. 372-389
-
-
Bjesse, P.1
Claessen, K.2
-
5
-
-
35048861896
-
A tool for checking ANSI-C programs
-
Jensen, K., Podelski, A. (eds.) TACAS 2004. Springer, Heidelberg
-
Clarke, E., Kroening, D., Lerda, F.: A tool for checking ANSI-C programs. In: Jensen, K., Podelski, A. (eds.) TACAS 2004. LNCS, vol. 2988, pp. 168-176. Springer, Heidelberg (2004)
-
(2004)
LNCS
, vol.2988
, pp. 168-176
-
-
Clarke, E.1
Kroening, D.2
Lerda, F.3
-
6
-
-
24644505403
-
SATABS: SAT-based predicate abstraction for ANSI-C
-
Halbwachs, N., Zuck, L.D. (eds.) TACAS 2005. Springer, Heidelberg
-
Clarke, E., Kroening, D., Sharygina, N., Yorav, K.: SATABS: SAT-based predicate abstraction for ANSI-C. In: Halbwachs, N., Zuck, L.D. (eds.) TACAS 2005. LNCS, vol. 3440, pp. 570-574. Springer, Heidelberg (2005)
-
(2005)
LNCS
, vol.3440
, pp. 570-574
-
-
Clarke, E.1
Kroening, D.2
Sharygina, N.3
Yorav, K.4
-
7
-
-
77952137297
-
SMT-based bounded model checking for embedded ANSI-C software
-
Cordeiro, L., Fischer, B., Marques-Silva, J.: SMT-based bounded model checking for embedded ANSI-C software. In: ASE (2009)
-
(2009)
ASE
-
-
Cordeiro, L.1
Fischer, B.2
Marques-Silva, J.3
-
8
-
-
13644261480
-
Using induction and BDDs to model check invariants
-
Chapman & Hall, Boca Raton
-
Déharbe, D., Moreira, A.M.: Using induction and BDDs to model check invariants. In: CHARME. IFIP Conference Proceedings, vol. 105, pp. 203-213. Chapman & Hall, Boca Raton (1997)
-
(1997)
CHARME. IFIP Conference Proceedings
, vol.105
, pp. 203-213
-
-
Déharbe, D.1
Moreira, A.M.2
-
10
-
-
21644474151
-
RacerX: Effective, static detection of race conditions and deadlocks
-
SOSP'03: Proceedings of the 19th ACM Symposium on Operating Systems Principles
-
Engler, D., Ashcraft, K.: RacerX: Effective, static detection of race conditions and deadlocks. In: SOSP, pp. 237-252. ACM, New York (2003) (Pubitemid 40929700)
-
(2003)
Operating Systems Review (ACM)
, vol.37
, Issue.5
, pp. 237-252
-
-
Engler, D.1
Ashcraft, K.2
-
11
-
-
0034446877
-
Type-based race detection for Java
-
ACM, New York
-
Flanagan, C., Freund, S.N.: Type-based race detection for Java. In: PLDI, pp. 219-232. ACM, New York (2000)
-
(2000)
PLDI
, pp. 219-232
-
-
Flanagan, C.1
Freund, S.N.2
-
12
-
-
17044436380
-
Dynamic partial-order reduction for model checking software
-
DOI 10.1145/1047659.1040315
-
Flanagan, C., Godefroid, P.: Dynamic partial-order reduction for model checking software. In: POPL, pp. 110-121. ACM, New York (2005) (Pubitemid 40493971)
-
(2005)
ACM SIGPLAN Notices
, vol.40
, Issue.1
, pp. 110-121
-
-
Flanagan, C.1
Godefroid, P.2
-
13
-
-
30344444447
-
Using satisfiability modulo theories for inductive verification of Lustre programs
-
Franzén, A.: Using satisfiability modulo theories for inductive verification of Lustre programs. Electr. Notes Theor. Comput. Sci. 144(1), 19-33 (2006)
-
(2006)
Electr. Notes Theor. Comput. Sci.
, vol.144
, Issue.1
, pp. 19-33
-
-
Franzén, A.1
-
14
-
-
58049163322
-
Scaling up the formal verification of Lustre programs with SMT-based techniques
-
IEEE, Los Alamitos
-
Hagen, G., Tinelli, C.: Scaling up the formal verification of Lustre programs with SMT-based techniques. In: FMCAD, pp. 109-117. IEEE, Los Alamitos (2008)
-
(2008)
FMCAD
, pp. 109-117
-
-
Hagen, G.1
Tinelli, C.2
-
15
-
-
34547482005
-
Automatic generation of schedulings for improving the test coverage of systems-on-a-chip
-
DOI 10.1109/FMCAD.2006.10, 4021023, Proceedings of Formal Methods in Computer Aided Design, FMCAD 2006
-
Helmstetter, C., Maraninchi, F., Maillet-Contoz, L., Moy, M.: Automatic generation of schedulings for improving the test coverage of systems-on-a-chip. In: FMCAD, pp. 171-178. IEEE, Los Alamitos (2006) (Pubitemid 47159938)
-
(2006)
Proceedings of Formal Methods in Computer Aided Design, FMCAD 2006
, pp. 171-178
-
-
Helmstetter, C.1
Maraninchi, F.2
Maillet-Contoz, L.3
Moy, M.4
-
16
-
-
27644567646
-
Power efficient processor architecture and the Cell processor
-
IEEE Computer Society, Los Alamitos
-
Hofstee, H.P.: Power efficient processor architecture and the Cell processor. In: HPCA, pp. 258-262. IEEE Computer Society, Los Alamitos (2005)
-
(2005)
HPCA
, pp. 258-262
-
-
Hofstee, H.P.1
-
18
-
-
77951614062
-
-
IBM: Cell BE resource center (2009), http://www.ibm.com/developerworks/ power/cell/
-
(2009)
-
-
-
19
-
-
35248888895
-
Efficient computation of recurrence diameters
-
Zuck, L.D., Attie, P.C., Cortesi, A., Mukhopadhyay, S. (eds.) VMCAI 2003. Springer, Heidelberg
-
Kroening, D., Strichman, O.: Efficient computation of recurrence diameters. In: Zuck, L.D., Attie, P.C., Cortesi, A., Mukhopadhyay, S. (eds.) VMCAI 2003. LNCS, vol. 2575, pp. 298-309. Springer, Heidelberg (2002)
-
(2002)
LNCS
, vol.2575
, pp. 298-309
-
-
Kroening, D.1
Strichman, O.2
-
20
-
-
77951567885
-
Formal verification of FPGA cores
-
Lillieroth, C.J., Singh, S.: Formal verification of FPGA cores. Nord. J. Comput. 6(3), 299-319 (1999)
-
(1999)
Nord. J. Comput.
, vol.6
, Issue.3
, pp. 299-319
-
-
Lillieroth, C.J.1
Singh, S.2
-
21
-
-
84958640835
-
Circular compositional reasoning about liveness
-
Pierre, L., Kropf, T. (eds.) CHARME 1999. Springer, Heidelberg
-
McMillan, K.L.: Circular compositional reasoning about liveness. In: Pierre, L., Kropf, T. (eds.) CHARME 1999. LNCS, vol. 1703, pp. 342-346. Springer, Heidelberg (1999)
-
(1999)
LNCS1703
, pp. 342-346
-
-
McMillan, K.L.1
-
22
-
-
33745217382
-
Effective static race detection for java
-
DOI 10.1145/1133255.1134018, PLDI 2006 - Proceedings of the 2006 ACM SIGPLAN Conference on Programming Language Design and Implementation
-
Naik, M., Aiken, A., Whaley, J.: Effective static race detection for Java. In: PLDI, pp. 308-319. ACM, New York (2006) (Pubitemid 44074942)
-
(2006)
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)
, vol.2006
, pp. 308-319
-
-
Naik, M.1
Aiken, A.2
Whaley, J.3
-
23
-
-
0031272525
-
Eraser: A dynamic data race detector for multithreaded programs
-
Savage, S., Burrows, M., Nelson, G., Sobalvarro, P., Anderson, T.: Eraser: A dynamic data race detector for multithreaded programs. ACM Trans. Comput. Syst. 15(4), 391-411 (1997)
-
(1997)
ACM Trans. Comput. Syst.
, vol.15
, Issue.4
, pp. 391-411
-
-
Savage, S.1
Burrows, M.2
Nelson, G.3
Sobalvarro, P.4
Anderson, T.5
-
24
-
-
70350787997
-
-
Johnson, S.D., Hunt Jr., W.A. (eds.) FMCAD 2000. Springer, Heidelberg
-
Sheeran, M., Singh, S., Stålmarck, G.: Checking safety properties using induction and a SAT-solver. In: Johnson, S.D., Hunt Jr., W.A. (eds.) FMCAD 2000. LNCS, vol. 1954, pp. 108-125. Springer, Heidelberg (2000)
-
(2000)
LNCS
, vol.1954
, pp. 108-125
-
-
Sheeran, M.1
Singh, S.2
Stålmarck, G.3
Induction, C.S.P.U.4
Sat-solver, A.5
-
25
-
-
48349119981
-
Explicit safety property strengthening in SAT-based induction
-
IEEE, Los Alamitos
-
Vimjam, V.C., Hsiao, M.S.: Explicit safety property strengthening in SAT-based induction. In: VLSID, pp. 63-68. IEEE, Los Alamitos (2007)
-
(2007)
VLSID
, pp. 63-68
-
-
Vimjam, V.C.1
Hsiao, M.S.2
|