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Volumn , Issue , 2007, Pages 63-68

Explicit safety property strengthening in SAT-based induction

Author keywords

[No Author keywords available]

Indexed keywords

CARBON FIBER REINFORCED PLASTICS; COMPUTER PROGRAMMING LANGUAGES; INTEGRATED CIRCUITS; STRENGTHENING (METAL);

EID: 48349119981     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2007.80     Document Type: Conference Paper
Times cited : (5)

References (25)
  • 2
    • 26844534170 scopus 로고
    • Symbolic Model Checking: An Approach to the State Explosion Problem
    • K. McMillan, "Symbolic Model Checking: An Approach to the State Explosion Problem". Kluwer Academic Publishers, 1993.
    • (1993) Kluwer Academic Publishers
    • McMillan, K.1
  • 5
    • 84893769353 scopus 로고    scopus 로고
    • Sequential Equivalence Checking without State-Space Traversal
    • C. A. J. van Eijk, "Sequential Equivalence Checking without State-Space Traversal". Proc of DATE, 1998.
    • (1998) Proc of DATE
    • van Eijk, C.A.J.1
  • 6
    • 0005071892 scopus 로고    scopus 로고
    • Checking Safety Properties using Induction and a SAT Solver
    • Nov
    • M. Sheeran, S. Singh and G. Stalmarck, "Checking Safety Properties using Induction and a SAT Solver". Proc of FMCAD, Nov 2000.
    • (2000) Proc of FMCAD
    • Sheeran, M.1    Singh, S.2    Stalmarck, G.3
  • 7
    • 2542494639 scopus 로고    scopus 로고
    • SAT-based Verification without State-Space Traversal
    • P. Bjesse and K. Claessen, "SAT-based Verification without State-Space Traversal". Proc of FMCAD, 2000.
    • (2000) Proc of FMCAD
    • Bjesse, P.1    Claessen, K.2
  • 9
    • 0942299121 scopus 로고    scopus 로고
    • Accelerating Bounded Model Checking of Safety Properties
    • Jan
    • O. Strichman, "Accelerating Bounded Model Checking of Safety Properties", In Formal Methods in System Design, vol 24, pp. 5-24, Jan 2004.
    • (2004) Formal Methods in System Design , vol.24 , pp. 5-24
    • Strichman, O.1
  • 10
    • 13944277027 scopus 로고    scopus 로고
    • Temporal Induction by Incremental SAT Solving
    • July
    • N. Een and N. Sorensson, "Temporal Induction by Incremental SAT Solving". Proc of BMC, July 2003.
    • (2003) Proc of BMC
    • Een, N.1    Sorensson, N.2
  • 11
    • 16244369431 scopus 로고    scopus 로고
    • Incremental Deductive & Inductive Reasoning for SAT-based Bounded Model Checking
    • L. Zhang, M. R. Prasad and M. S. Hsiao, "Incremental Deductive & Inductive Reasoning for SAT-based Bounded Model Checking". Proc of ICCAD, pp. 502-509, 2004.
    • (2004) Proc of ICCAD , pp. 502-509
    • Zhang, L.1    Prasad, M.R.2    Hsiao, M.S.3
  • 13
    • 1642580373 scopus 로고    scopus 로고
    • Bounded Model Checking and Induction: From Refutation to Verification
    • L. de Moura, H. Rueß and M. Sorea, "Bounded Model Checking and Induction: From Refutation to Verification". Proc. of CAV, 2003.
    • (2003) Proc. of CAV
    • de Moura, L.1    Rueß, H.2    Sorea, M.3
  • 14
    • 33646944389 scopus 로고    scopus 로고
    • An Efficient Sequential SAT Solver With Improved Search Strategies
    • March
    • F. Lu, M. K. Iyer, G. Parthasarathy and K.-T. Cheng, "An Efficient Sequential SAT Solver With Improved Search Strategies". Proc. of DATE, March 2005.
    • (2005) Proc. of DATE
    • Lu, F.1    Iyer, M.K.2    Parthasarathy, G.3    Cheng, K.-T.4
  • 15
    • 0032680865 scopus 로고    scopus 로고
    • GRASP: A Search Algorithm for Propositional Satisfiability
    • May
    • J. P. Marques-Silva and K. A. Sakallah, "GRASP: A Search Algorithm for Propositional Satisfiability", In IEEE Trans. on Computers, vol 48, pp.506-521, May 1999.
    • (1999) IEEE Trans. on Computers , vol.48 , pp. 506-521
    • Marques-Silva, J.P.1    Sakallah, K.A.2
  • 17
    • 84893808653 scopus 로고    scopus 로고
    • BerkMin: A Fast and Robust SAT-Solver
    • E. Goldberg and Y. Novikov, "BerkMin: a Fast and Robust SAT-Solver". Proc. of DATE, pp. 142-149, 2002.
    • (2002) Proc. of DATE , pp. 142-149
    • Goldberg, E.1    Novikov, Y.2
  • 18
    • 2942671018 scopus 로고    scopus 로고
    • http://www.cs.sfu.ca/loryan/personal. Siege SAT solver.
    • Siege SAT solver
  • 19
    • 0019543877 scopus 로고
    • An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
    • March
    • P. Goel, "An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits". IEEE Trans. on Comp., vol. C-30, pp. 215-222, March 1981.
    • (1981) IEEE Trans. on Comp , vol.C-30 , pp. 215-222
    • Goel, P.1
  • 20
    • 85006526304 scopus 로고
    • Critical Path Tracing: An Alternative to Fault Simulation
    • M. Abramovici, P. R. Menon and D. T. Miller, "Critical Path Tracing: An Alternative to Fault Simulation". Proc. of DAC, 1988, pp. 468-474.
    • (1988) Proc. of DAC , pp. 468-474
    • Abramovici, M.1    Menon, P.R.2    Miller, D.T.3
  • 21
    • 85048855760 scopus 로고
    • Scoap: Sandia Controllability/ Observability analysis program
    • H. Goldstein and E. L. Thigpen, "Scoap: Sandia Controllability/ Observability analysis program". Proc of DAC, 1980.
    • (1980) Proc of DAC
    • Goldstein, H.1    Thigpen, E.L.2
  • 22
    • 84881072062 scopus 로고
    • A Computing Procedure for Quantification Theory
    • M. Davis and H. Putnam, "A Computing Procedure for Quantification Theory". ACM Journal, vol 7, pp.201-215, 1960.
    • (1960) ACM Journal , vol.7 , pp. 201-215
    • Davis, M.1    Putnam, H.2
  • 23
    • 48349108711 scopus 로고    scopus 로고
    • Border-block Triangular Form and Conjunction Schedule in Image Computation
    • Nov
    • In-Ho Moon, G. Hatchel and F. Somenzi, "Border-block Triangular Form and Conjunction Schedule in Image Computation". Proc of FMCAD, Nov 2000.
    • (2000) Proc of FMCAD
    • In-Ho Moon, G.H.1    Somenzi, F.2
  • 24
    • 48349095678 scopus 로고    scopus 로고
    • http://www.princeton.edu/chaff/zchaff.html
  • 25
    • 0036045483 scopus 로고    scopus 로고
    • Combining Strengths of Circuit-based and CNF-based algorithms for a High-Performance SAT Solver
    • June
    • M. K. Ganai, L. Zhang, P. Ashar, A. Gupta and S. Malik, "Combining Strengths of Circuit-based and CNF-based algorithms for a High-Performance SAT Solver", In Proc. of DAC, pp. 747-750, June 2002.
    • (2002) Proc. of DAC , pp. 747-750
    • Ganai, M.K.1    Zhang, L.2    Ashar, P.3    Gupta, A.4    Malik, S.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.