Difficulty of power supply voltage scaling in large scale subthreshold logic circuits

IEICE Transactions on Electronics

Volumn E93-C, Issue 3, 2010, Pages 332-339

  Yasufuku, Tadashi ^a   Niiyama, Taro ^a   Piao, Zhe ^a   Ishida, Koichi ^a   Murakata, Masami ^b   Takamiya, Makoto ^a   Sakurai, Takayasu ^a  

^a UNIVERSITY OF TOKYO   (Japan)

^b SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER   (Japan)

Author keywords

Body bias; Logic; Minimum operating voltage; Subthreshold; Variations

Indexed keywords

BIAS VOLTAGE; CMOS INTEGRATED CIRCUITS; LOGIC CIRCUITS; OSCILLATORS (ELECTRONIC); POWER SUPPLY CIRCUITS; THRESHOLD VOLTAGE; TIMING CIRCUITS; VOLTAGE SCALING;

BODY BIAS; LOGIC; OPERATING VOLTAGE; SUBTHRESHOLD; VARIATIONS;

COMPUTER CIRCUITS;

EID: 77950376984     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1587/transele.E93.C.332     Document Type: Article

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