Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2009, Pages 478-484

  Chong, Soogine ^a   Akarvardar, Kerem ^a   Parsa, Roozbeh ^a   Yoon, Jun Bo ^b   Howe, Roger T ^a   Mitra, Subhasish ^a   Wong, H S Philip ^a  

^a Stanford University   (United States)

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CELLS; CIRCUIT SIMULATION; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; CYTOLOGY; ELECTRIC LOSSES; SLOPE STABILITY;

HYSTERETIC PROPERTIES; NANO-ELECTROMECHANICAL; OFF-STATE LEAKAGE; PERFORMANCE DEGRADATION; READ STATIC NOISE MARGIN (SNM); STATIC RANDOM ACCESS MEMORY; STATIC-POWER DISSIPATION; SUBTHRESHOLD SLOPE;

STATIC RANDOM ACCESS STORAGE;

EID: 76349113814     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1687399.1687490     Document Type: Conference Paper

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