Suppression of gate-induced drain leakage by optimization of junction profiles in 22 nm and 32 nm SOI nFETs

Solid-State Electronics

Volumn 54, Issue 2, 2010, Pages 115-122

  Schenk, Andreas ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

22 nm technology node; DGSOI; Gate induced drain leakage; High K gate stacks; Non local band to band tunneling; SGSOI; Simulation; TCAD

Indexed keywords

BAND TO BAND TUNNELING; GATE INDUCED DRAIN LEAKAGES; HIGH-K GATE STACKS; NONLOCAL; TECHNOLOGY NODES;

DEGRADATION; GATES (TRANSISTOR); HAFNIUM COMPOUNDS; LOGIC GATES; NANOTECHNOLOGY; WIND TUNNELS;

DRAIN CURRENT;

EID: 76349111562     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2009.12.005     Document Type: Article

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