Evidence for suppressed short-channel effects in deep submicron dual-material gate (DMG) partially depleted SOI MOSFETs - A two-dimensional analytical approach

Microelectronic Engineering

Volumn 75, Issue 4, 2004, Pages 367-374

  Kumar, M Jagadesh ^a   Reddy, G Venkateshwar ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

Author keywords

Dual material gate; Partially depleted; Silicon on insulator MOSFET; Surface potential; Threshold voltage; Two dimensional modeling

Indexed keywords

COMPUTER SIMULATION; DOPING (ADDITIVES); ELECTRIC FIELDS; MOSFET DEVICES; SUBSTRATES; SURFACE PROPERTIES; THICKNESS MEASUREMENT; THRESHOLD VOLTAGE;

DUAL MATERIAL GATE; PARTIALLY DEPLETED; SURFACE POTENTIAL; TWO-DIMENSIONAL MODELING;

SILICON ON INSULATOR TECHNOLOGY;

EID: 7544236163     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2004.07.058     Document Type: Article

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