A low-noise and low-power frequency synthesizer using offset phase-locked loop in 0.13 μ m CMOS

IEEE Microwave and Wireless Components Letters

Volumn 20, Issue 1, 2010, Pages 52-54

  Park, Pyoungwon ^a   Park, Dongmin ^a   Cho, Seonghwan ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Frequency synthesizer; Low noise; Low power; Offset phase locked loop

Indexed keywords

CMOS PROCESSS; DELTA SIGMA MODULATOR; FRACTIONAL-N FREQUENCY SYNTHESIZERS; LOW NOISE; LOW POWER; NOISE REDUCTIONS; OFFSET PHASE-LOCKED LOOPS; QUANTIZATION NOISE; RECYCLING TECHNIQUES;

FREQUENCY SYNTHESIZERS; LOW PASS FILTERS; MODULATORS; SPURIOUS SIGNAL NOISE;

PHASE LOCKED LOOPS;

EID: 75149137298     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/LMWC.2009.2035967     Document Type: Article

References (7)

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