An architecture for asynchronous FPGAs

Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003

Volumn , Issue , 2003, Pages 170-177

  Wong, Catherine G ^a   Martin, Alain J ^a   Thomas, Peter ^a  

^a CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC DEVICES;

ASYNCHRONOUS PIPELINE; DELAYINSENSITIVE; LOGIC CELLS; PLACE AND ROUTE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 74549148668     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2003.1275745     Document Type: Conference Paper

References (13)

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