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Volumn , Issue , 2001, Pages 150-155

A fast asynchronous re-configurable architecture for multimedia applications

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; INTEGRATED CIRCUITS; MOTION PICTURE EXPERTS GROUP STANDARDS; RECONFIGURABLE HARDWARE; SYSTEMS ANALYSIS;

EID: 84966335489     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2001.953019     Document Type: Conference Paper
Times cited : (8)

References (14)
  • 6
    • 0026976619 scopus 로고
    • Design of delay-insensitive circuits using multi-ring structures
    • G. Musgrave, editor, IEEE Computer Society Press
    • J. Sparsoe, J. Staunstrup, M. Dantzer-Sorensen, "Design of delay-insensitive circuits using multi-ring structures", in G. Musgrave, editor, EURO-DAC'92, IEEE Computer Society Press, 1992
    • (1992) EURO-DAC'92
    • Sparsoe, J.1    Staunstrup, J.2    Dantzer-Sorensen, M.3
  • 7
    • 84902461275 scopus 로고
    • Inverse two dimensional DCT
    • August
    • Chen-Wang, "Inverse two dimensional DCT", in Proceedings of the IEEE ASSP-32, pp. 803-816, August 1984
    • (1984) Proceedings of the IEEE ASSP-32 , pp. 803-816
    • Chen-Wang1
  • 10
    • 0027641441 scopus 로고
    • Using FPGAs to implement self-timed systems
    • June
    • E. Brunvand, "Using FPGAs to implement self-timed systems", Journal of VLSI Signal Processing, 6(2), pages 173-190, June 1993
    • (1993) Journal of VLSI Signal Processing , vol.6 , Issue.2 , pp. 173-190
    • Brunvand, E.1
  • 13


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.