메뉴 건너뛰기




Volumn , Issue , 2009, Pages 186-190

Investigation of crosstalk among vias

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DENSITY; CRITICAL PROBLEMS; DESIGN VERIFICATION; EQUIVALENT CIRCUIT MODEL; GEOMETRICAL PARAMETERS; HIGH SPEED DIGITAL CIRCUIT; MULTI-STEP; PARALLEL PLANES; PHYSICS-BASED; SIGNAL QUALITY; UNDERLYING MECHANISM;

EID: 74349106923     PISSN: 10774076     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISEMC.2009.5284637     Document Type: Conference Paper
Times cited : (13)

References (8)
  • 1
    • 63549119657 scopus 로고    scopus 로고
    • Return via connections for extending signal link path bandwidth of via transitions
    • Hamburg Germany, September
    • X. Chang, B. Archambeault, M. Cocchini, F. De Paulis, V. Sivarajan, et al "Return via connections for extending signal link path bandwidth of via transitions", IEEE EMC Europe, Hamburg Germany, September, 2008.
    • (2008) IEEE EMC Europe
    • Chang, X.1    Archambeault, B.2    Cocchini, M.3    De Paulis, F.4    Sivarajan, V.5
  • 2
    • 84866404184 scopus 로고    scopus 로고
    • Developing a 'physical' model for vias
    • Santa Clara, CA. February
    • C. Schuster, Y. Kwark, G. Selli, and P. Muthana, "Developing a 'physical' model for vias," DesignCon 2006, Santa Clara, CA. February, 2006
    • (2006) DesignCon 2006
    • Schuster, C.1    Kwark, Y.2    Selli, G.3    Muthana, P.4
  • 5
    • 58049097221 scopus 로고    scopus 로고
    • S. Wu, X. Chang and J. Fan, Eliminating via-plane coupling using ground vias for high-speed signal transition, EPEP 2008, Saint Jose, CA, 2008, pp. 247-250.
    • S. Wu, X. Chang and J. Fan, "Eliminating via-plane coupling using ground vias for high-speed signal transition," EPEP 2008, Saint Jose, CA, 2008, pp. 247-250.
  • 6
    • 84866362819 scopus 로고    scopus 로고
    • Developing a physical model for vias - part II: Coupled and grounded return vias
    • Santa Clara
    • G. Selli, C. Schuster, Y. H. Kwark, M. B. Ritter, and J. L. Drewniak, "Developing a physical model for vias - part II: coupled and grounded return vias," DesignCon 2007, Santa Clara, 2007
    • (2007) DesignCon 2007
    • Selli, G.1    Schuster, C.2    Kwark, Y.H.3    Ritter, M.B.4    Drewniak, J.L.5
  • 7
    • 51649126662 scopus 로고    scopus 로고
    • Analytical evaluation of via-plate capacitance for multilayer printed circuit boards and packages
    • September
    • Y. Zhang, J. Fan, G. Selli, M. Cocchini, and F. Paulis, "Analytical evaluation of via-plate capacitance for multilayer printed circuit boards and packages", IEEE Transactions on Microwave Theory and Techniques, Vol.56, No.9, September, 2008, pp2118-2128
    • (2008) IEEE Transactions on Microwave Theory and Techniques , vol.56 , Issue.9 , pp. 2118-2128
    • Zhang, Y.1    Fan, J.2    Selli, G.3    Cocchini, M.4    Paulis, F.5
  • 8
    • 74349127318 scopus 로고    scopus 로고
    • A.R.Chada, Y. Zhang, G. Feng, J. L. Drewniak, and J., Fan, Impedance of an infinitely large parallel-plane pair and its applications in engineering modeling, submitted to the IEEE International Symposium on Electromagnetic Compatibility, Austin, TX, 2009
    • A.R.Chada, Y. Zhang, G. Feng, J. L. Drewniak, and J., Fan, "Impedance of an infinitely large parallel-plane pair and its applications in engineering modeling," submitted to the IEEE International Symposium on Electromagnetic Compatibility, Austin, TX, 2009


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.