A 2.4 GHz low-power sixth-order RF bandpass ΔΣ converter in CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 11, 2009, Pages 2873-2880

  Ryckaert, Julien ^a   Borremans, Jonathan ^a   Verbruggen, Bob ^a,b   Bos, Lynn ^a,b   Armiento, Costantino ^a,c   Craninckx, Jan ^a   Van Der Plas, Geert ^a  

^a IMEC   (Belgium)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

^c UNIVERSITY OF PISA   (Italy)

Author keywords

Analog to digital converters; Continuous time modulation; Direct RF sampling; Impulse invariance transformation

Indexed keywords

90NM CMOS; ANALOG-TO-DIGITAL CONVERTERS; BAND PASS; CENTER FREQUENCY; DIRECT RF SAMPLING; IMPULSE-INVARIANCE TRANSFORMATION; ISM BANDS; LC RESONATORS; LOOP FILTER; LOW POWER; NYQUIST FREQUENCY; POWER CONSUMPTION; RECEIVER ARCHITECTURE; RF BANDPASS;

ANALOG TO DIGITAL CONVERSION; CONTINUOUS TIME SYSTEMS; ELECTRIC POWER UTILIZATION; MULTICARRIER MODULATION;

BANDPASS FILTERS;

EID: 70449567251     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2028914     Document Type: Article

References (14)

1. J. Mitola, The software radio architecture, IEEE Commun. Mag., vol.33, no.5, pp. 25-38, May 1995.
2. G. Van Der Plas, S. Decoutere, and S. Donnay, A 0.16 pJ/conversionstep 2.5 mW 1.25 GS/s 4b ADC in a 90 nm digital CMOS process, in IEEE ISSCC Dig. Tech. Papers, Feb. 2006, pp. 566-567.
3. A. Chalvatzis, E. Gagnon, M. Repeta, and S. Voinigescu, A low-noise 40 GS/s continuous-time bandpass - ADC centered at 2 GHz for direct sampling receivers, IEEE J. Solid-State Circuits, vol.42, no.5, pp. 1065-1074, May 2007.
4. B. Thandri and J. Silva-Martinez, A 63 dB 75-mW bandpass RF ADC at 950 MHz using 3.8-GHz clock in 0.25- m SiGe BiCMOS technology, IEEE J. Solid-State Circuits, vol.42, no.2, pp. 269-279, Feb. 2007.
5. J. Cherry,W. Snelgrove, and W. Gao, On the design of a fourth-order continuous-time LC delta-sigma modulator for UHF A/D conversion, IEEE Trans. Circuits Syst. II, vol.47, no.6, pp. 518-530, Jun. 2000.
6. S. Chandrasekaran and W. Black, Jr., Sub-sampling sigma-delta modulator for baseband processing, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), 2002, pp. 195-198.
7. Y.-G. Yoon, J. Kim, T.-K. Jang, and S.-H. Cho, A time-based bandpass ADC using time-interleaved coltage-controlled oscillators, IEEE Trans. Circuits Syst. I, vol.55, no.11, pp. 3571-3581, Dec. 2008.
8. Y.-G. Yoon and S.-H. Cho, A 1.5 GHz 63 dB SNR 20 mW direct RF sampling bandpass VCO-based ADC in 65 nm CMOS, in Proc. IEEE Symp. VLSI Circuits, 2009.
9. U. Koc and J. Lee, Direct RF sampling continuous-time bandpass delta-sigma A/D converter design for 3G wireless applications, in IEEE Int. Symp. Circuits and Systems (ISCAS), May 2004, pp. 409-412.
10. J. Ryckaert, J. Borremans, B. Verbruggen, J. Van Driessche, L. Van Der Perre, J. Craninckx, and G. Van Der Plas, A 2.4 GHz 40 mW 40 dB SNDR/62 dB SFDR 60 MHz bandwidth mirrored-image RF bandpass - ADC in 90 nm CMOS, in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2008, pp. 361-364.
11. C. A. Lalandais-Perrault, A parallel structure of a continuous-time filter for bandpass sigma-delta A/D converters, in Proc. IEEE Int. Conf. Electronic Circuits and Systems, Dec. 2003, vol.3, pp. 954-957.
12. R. Schreier and B. Zhang, Delta-Sigma modulators employing continuous- time circuitry, IEEE Trans. Circuits Syst. I, vol.43, no.4, pp. 324-332, Apr. 1996.
13. S. Loeda, H. Reekie, and B. Mulgrew, On the design of high-performance wideband continuous-time sigma-delta converters using numerical optimization, IEEE Trans. Circuits Syst. I, vol.53, no.4, pp. 802-810, Apr. 2006.
14. E. Van Der Zwan and D. E. C. , A 0.2-mW CMOS - modulator for speech coding with 80 dB dynamic range, IEEE J. Solid-State Circuits, vol.31, no.12, pp. 1873-1880, Dec. 1996.