A 63 dB SNR, 75-mW bandpass RF Σδ ADC at 950 MHz using 3.8-GHz clock in 0.25-μm SiGe BiCMOS technology

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 2, 2007, Pages 269-279

  Thandri, Bharath Kumar ^b   Silva Martinez, Jose ^a,b  

^a IEEE   (United States)

^b Department of Electrical and Computer Engineering   (United States)

Author keywords

Bandpass ADC; Continuous time analog to digital converter; Non return to zero DAC; RF sampling; Sigma delta

Indexed keywords

CONTINUOUS-TIME ANALOG-TO-DIGITAL CONVERTER; NON-RETURN-TO-ZERO DAC; RF SAMPLING;

ANALOG TO DIGITAL CONVERSION; INTEGRATED CIRCUIT LAYOUT; JITTER;

CMOS INTEGRATED CIRCUITS;

EID: 33847742654     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.889389     Document Type: Article

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