On the design of a fourth-order continuous-time LC delta-sigma modulator for UHF A/D conversion

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 6, 2000, Pages 518-530

  Cherry, James A ^a,d   Martin Snelgrove, W ^b   Gao, Weinan ^c  

^a CARLETON UNIVERSITY   (Canada)

^b Philsar Semiconductor Inc   (Canada)

^c SOMA Networks Inc   (Canada)

^d TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; HETERODYNING; INTEGRATED CIRCUIT LAYOUT; MODULATORS;

ANALOG SIGNALS; BANDPASS DELTA SIGMA MODULATOR; CONTINUOUS TIME SYSTEM; TRANSCONDUCTOR;

DELTA SIGMA MODULATION;

EID: 0033723942     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.847067     Document Type: Article

References (20)

1. W. Gao, J. A. Cherry, and W. M. Snelgrove, "A 4 GHz fourth-order SiGe HBTbandpass AE modulator," in Proc. VLSI Circuits Symp., 1998,pp. 174-175.
2. S. R. Norsworthy, R. Schreier, and G. C. Ternes, Eds., Delta-Sigma Data Converters: Theory, Design, and Simulation. Piscataway, NJ: IEEE Press, 1997.
3. R. Adams, "Design and implementation of an audio 18-bit analog-todigital converter using oversampling techniques," J. Audio Eng. Soc., pp. 153-166, Mar./Apr. 1986.
4. E. J. van der Zwan, "A 2.3 mW CMOS E A modulator for audio applications," Int. Solid-State Circ. Conf. Tech. Dig., pp. 220-221, 1997.
5. O. Shoaei and W. M. Snelgrove, "Design and implementation of a tunable 40 MHz-70 MHz Gm-C bandpass AE modulator," IEEE Trans. Circuits Syst. 11, vol. 44, pp. 521-530, July 1997.
6. J. A. Cherry and W. M. Snelgrove, Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice, and Fundamental Performance Limits. Norwell, MA: Kluwer, 1999.
7. G. Raghavan, J. F. Jensen, R. H. Waiden, and W. P. Posey, "A bandpass E A modulator with 92 dB SNR and center frequency continuously programmable from 0 to 70 MHz,"Int. Solid-State Circuits Conf. Tech. Dig., pp. 214-215, 1997.
8. A. Jayaraman, P. Asbeck, K. Nary, S. Beccue, and K.-C. Wang, "Bandpass delta-sigma modulator with 800 MHz center frequency," in Proc. GaAs Int. Circuits Symp., 1997, pp. 95-98.
9. W. Gao and W. M. Snelgrove, "A 950 MHz second-order integrated EC bandpass AE modulator," in Proc. VLSI Circuits Symp., 1997, pp. 111-112.
10. T. Yamaji and H. Tanimoto, "A 2 GHz balanced harmonic mixer for direct-conversion receivers," in Proc. Custom Integrated Circuits Conf., 1997, pp. 193-196.
11. J. F Jensen, G. Raghavan, A. E. Cosand, and R. H. Waiden, "A 3.2-GHz second-order delta-sigma modulator implemented in InP HBT technology," IEEEJ. Solid-State Circuits, pp. 1119-1127, Oct. 1995.
12. M. A. Morin, "A 1.6 Gb/s delta-sigma modulator with integrated wideband mixer for RF applications," in Proc. Bipolar/BiCMOS Circuits Technical Mtg., 1998, pp. 148-151.
13. T. H. Eee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, MA: Cambridge Univ. Press, 1998.
14. P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 3rd ed. New York: Wiley, 1993.
15. F. M. Gardner, "A transformation for digital simulation of analog filters," IEEE Trans. Commun., pp. 676-680, July 1986.
16. B. E. Böser and B. A. Wooley, "The design of sigma-delta modulation analog-to-digital converters," IEEE J. Solid-State Circuits, vol. 33, pp. 1298-1308, Dec. 1988.
17. D. L. Harame, J. H. Comfort, J. D. Cressler, E. F. Crabbe, J. Y.-C. Sun, B. S. Meyerson, and T. Rice, "Si/SiGe epitaxial-base transistors-Part I: Materials, physics, and circuits," IEEE Trans. Electron Devices, pp. 45568, Mar. 1995.
18. B. Gilbert, "The multi-tanh principle: A tutorial overview," IEEE J. Solid-State Circuits, pp. 2-17, Jan. 1998.
19. J. A. Cherry and W. M. Snelgrove, "Clock jitter and quantizer metastability in continuous-time delta-sigma modulators," IEEE Trans. Circuits Syst. II, vol. 46, pp. 661-676, June 1999.
20. T. L. Brooks, D. H. Robertson, D. F. Kelly, A. Del Muro, and S. W. Harston, "A 16 b E A pipeline ADC with 2.5 MHz output data-rate," Int. Solid-State Circ. Conf. Tech. Dig., pp. 208-209, 1997.