A physical unclonable function defined using power distribution system equivalent resistance variations

Proceedings - Design Automation Conference

Volumn , Issue , 2009, Pages 676-681

  Helinski, Ryan ^a   Acharyya, Dhruva ^b   Plusquellic, Jim ^a  

^a UNIVERSITY OF NEW MEXICO   (United States)

^b Verigy Inc   (United States)

Author keywords

Hardware security; Process variations; Unique identifier

Indexed keywords

COMPUTER AIDED DESIGN; HARDWARE SECURITY;

EQUIVALENT RESISTANCE; MANUFACTURING VARIATION; PHYSICALLY UNCLONABLE FUNCTIONS; POWER DISTRIBUTION SYSTEM; PROCESS VARIATION; SECURITY APPLICATION; SPECIALIZED HARDWARE; UNIQUE IDENTIFIERS;

CRYPTOGRAPHY;

EID: 70350741520     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1629911.1630089     Document Type: Conference Paper

References (24)

1. R. S. Pappu, B. Recht, J. Taylor and N. Gershenfeld, "Physical One-Way Functions," Science, 297(6), 2002, pp. 2026-2030.
2. Y. Su and J. Holleman and B. Otis, "A 1.6pJ/bit 96% Stable Chip ID Generating Circuit using Process Variations," Proc. of International Solid State Circuits Conference, 2007, pp. 406-407.
3. B. Gassend and D. E. Clarke and M. van Dijk and S. Devadas, "Silicon Physical Unknown Functions," Proc. of Conference on Computer and Communications Security, 2002, 148-160.
4. G. E. Suh and S. Devadas, "Physical Unclonable Functions for Device Authentication and Secret Key Generation", Proc. Design Automation Conference, 2007, pp. 9-14.
5. D. Lim, J. W. Lee, B. Gassend, G.E. Suh, M. van Dijk and S. Devadas, "Extracting Secret Keys from Integrated Circuits, " Trans. on Very Large Scale Integration Systems, 13(10), Oct. 2005, pp. 1200-1205.
6. B. Gassend, D. Clarke, M. van Dijk and S. Devadas, "Controlled Physical Random Functions," 18th Annual Computer Security Applications Conference, 2002.
7. B. Gassend and M. Van Dijk and D. Clarke and E. Torlak and S. Devadas and P. Tuyls, "Controlled Physical Random Functions and Applications," ACM Transactions on Information and System Security, Volume 10, Number 4, 2008.
8. E. Ozturk, G. Hammouri and B. Sunar, "Physical Unclonable Function with Tristate Buffers," Proc. International Symposium on Circuits and Systems, 2008, pp. 3194-3197.
9. E. Ozturk, G. Hammouri and B. Sunar, "Towards Robust Low Cost Authentication for Pervasive Devices", Proc. International Conference on Pervasive Computing and Communications, March 2008 pp. 170-178.
10. Y. Alkabani and F. Koushanfar and N. Kiyavash and M. Potkonjak, "Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach," Information Hiding, 2008.
11. R. Helinski, "Measuring Power Distribution System Resistance Variations for Application to Design for Manufacturability and Physical Unclonable Functions," M.S. thesis, University of Maryland, Baltimore Co., July, 2008.
12. R. Helinski, J. Plusquellic, "Measuring Power Distribution System Resistance Variations," Transactions on Semiconductor Manufacturing, Volume 21, Issue 3, pp. 444-453, Aug. 2008.
13. S. Maeda and H. Kuriyama and T. Ipposhi and S. Maegawa and Y. Inoue and M. Inuishi and N. Kotani and T. Nishimura, "An Artificial Fingerprint Device (AFD): a Study of Identification Number Applications Utilizing Characteristics Variation of Polycrystalline Silicon TFTs," Trans. on Electron Devices, number 50, issue 6, June, 2003, pp.1451- 1458.
14. K. Lofstrom, W. R. Daasch and D. Taylor, "IC Identification Circuits using Device Mismatch," Proc. of International Solid State Circuits Conference, 2000, pp. 372-373.
15. J. Huang and J. Lach, "IC Activation and User Authentication for Security-Sensitive Systems," Proc. of IEEE International Workshop on Hardware-Oriented Security and Trust, 2008, 79-83.
16. E. Simpson and P. Schaumont, "Offline Hardware/Software Authentication for Reconfigurable Platforms," Cryptographic Hardware and Embedded Systems, Volume 4249, Oct., 2006, pp. 10-13.
17. J. Guajardo, S. S. Kumar, G.-J. Schrijen and P. Tuyls, "Physical Unclonable Functions and Public Key Crypto for FPGA IP Protection," Conference on Field Programmable Logic and Applications, 2007, 189-195.
18. S. S. Kumar and J. Guajardo and R. Maes and Geert-Jan Schrijen and P. Tuyls, "Extended Abstract: The Butterfly PUF Protecting IP on Every FPGA," Proc. of IEEE International Workshop on Hardware-Oriented Security and Trust, 2008, pp. 70-73.
19. Y. Alkabani and F. Koushanfar and M. Potkonjak, "Remote Activation of ICs for Piracy Prevention and Digital Right Management," Proc. of International Conference on Computer-Aided Design, 2007, pp. 674-677.
20. J. Guajardo, S. S. Kumar and G. Schrijen and P. Tuyls, "Brand and IP Protection with Physical Unclonable Functions," IEEE Symposium on Circuits and Systems, 2008, pp. 3186-3189.
21. B. Gassend and D. Lim and D. Clarke and M. van Dijk and S. Devadas, "Identification and Authentication of Integrated Circuits, Concurrency and Computation: Practice and Experience, 2003.
22. J. Li and J. Lach, "At-Speed Delay Characterization for IC Authentication and Trojan Horse Detection," Workshop on Hardware-Oriented Security and Trust, 2008, 8-14.
23. J. Lee, Mohammad Tehranipoor, Chintan Patel and Jim Plusquellic, "Securing Designs Against Scan-Based Side-Channel Attacks," Transactions on Dependable and Secure Computing, Volume 4, Number 4, October-December 2007, pp. 325-336.
24. J. Lee, M. Tehranipoor, J. Plusquellic, "A Low-Cost Solution for Protecting IPs against Scan-Based Side-Channel Attacks," Proc. VLSI Test Symposium, May 2006, pp. 42-47.