At-speed delay characterization for IC authentication and Trojan horse detection

2008 IEEE International Workshop on Hardware-Oriented Security and Trust, HOST

Volumn , Issue , 2008, Pages 8-14

  Li, Jie ^a   Lach, John ^a  

^a UNIVERSITY OF VIRGINIA   (United States)

Author keywords

Hardware security; Hardware Trojan horse detection; IC authentication; Path delay characterization

Indexed keywords

ACCESS CONTROL; ELECTRONIC EQUIPMENT TESTING; ELECTRONICS INDUSTRY; INTEGRATED CIRCUITS; OPTICAL DESIGN; SPEED;

AT-SPEED; DELAY MEASUREMENTS; HARDWARE SECURITY; HARDWARE TROJAN HORSE DETECTION; IC AUTHENTICATION; NATIONAL SECURITIES; PATH DELAY CHARACTERIZATION; RUN-TIME; TROJAN HORSES;

AUTHENTICATION;

EID: 51849099113     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HST.2008.4559038     Document Type: Conference Paper

References (13)

1. D. Agrawal, S. Baktir, D. Karakoyunlu, P. Rohatgi, and B. Sunar, "Trojan detection using IC fingerprinting," IEEE Symposium on Security and Privacy, pp. 296-310, 2007.
2. D. Ernst, et al., "Razor: circuit-level correction of timing errors for low-power operation," IEEE Micro, vol. 24, no. 6, pp. 10-20, Nov. 2004.
3. B. Gassend, "Physical random functions," Master Thesis, February 2003.
4. B. Gassend, D. Clarke, M. van Dijk, and S. Devadas, "Silicon physical random functions," ACM Conference on Computer and Communications Security, pp. 148-160, 2002.
5. J. Li and J. Lach, "Negative-skewed shadow registers for at-speed delay variation characterization," IEEE International Conference on Computer Design, pp. 354-359, 2007.
6. S. Lopez-Beudo and E. Boemo, "Making visible the thermal behavior of embedded microprocessors on FPGAs - a progress report," ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 79-86, 2004.
7. S. Lopez-Beudo, P. Pernas, and E. Boemo, "Thermal testing on reconfigurable computers," IEEE Design and Test of Computers, vol. 17, no. 1, pp. 84-91, Jan-Mar 2000.
8. th USENIX Security Symposium, in press, 2008.
9. M. Saint-Laurent and M. Swaminathan, "A digitally adjustable resistor for path delay characterization in high-frequency microprocessors, " Southwest Symposium on Mixed-Signal Design, pp. 61-64, 2001.
10. G. E. Suh and S. Devadas, "Physical unclonable functions for device authentication and secret key generation," Design Automation Conference, pp. 9-14, 2007.
11. S. Velusamy, W. Huang, J. Lach, M. Stan, and K. Skadron, "Monitoring temperature in FPGA based SoCs," IEEE International Conference on Computer Design, pp. 634-640, 2005.
12. F. Wolff, C. Papachristou, S. Bhunia, and R. Chakraborty, "Towards trojan-free trusted ICs: problem analysis and detection scheme," pp. 1362-1365, Design, Automation and Test in Europe, 2008.
13. www.opencores.com