Remote activation of ICs for piracy prevention and digital right management

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2007, Pages 674-677

  Alkabani, Yousra ^a   Koushanfar, Farinaz ^a   Potkonjak, Miodrag ^b  

^a RICE UNIVERSITY   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVATION METHOD; ATTACK-RESILIENT; BENCHMARK CIRCUITS; CIRCUIT FUNCTIONALITY; COMPUTER-AIDED DESIGN; CONTROL SIGNALLING; DIGITAL RIGHT MANAGEMENT; FINITE STATE MACHINE; INTELLECTUAL PROPERTY (IP); INTERNATIONAL CONFERENCES; LOW OVERHEAD; PIRACY PREVENTION; REMOTE ACTIVATION; STATE TRANSITIONS;

DESIGN; ELECTRONICS INDUSTRY; INTEGRATED CIRCUITS; INTELLECTUAL PROPERTY; STANDARDS; WEIGHT CONTROL;

NETWORKS (CIRCUITS);

EID: 49749144533     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2007.4397343     Document Type: Conference Paper

References (11)

1. Y. Alkabani and F. Koushanfar. Active hardware metering for intellectual property protection and security. In USENIX Security. 2007.
2. B. Gassend, D. Lim, D. Clarke, M. Dijk, and S. Devadas. Identification and authentication of integrated circuits. Concurr. Comput. : Pract. Exper., 16(11):1077-1098, 2004.
3. F. Koushanfar and M. Potkonjak. CAD-based security, cryptography. and digital rights management. In Design Automation Conference (DAC), 2007.
4. F. Koushanfar and G. Qu. Hardware metering. In DAC, pages 490-493, 2001.
5. F. Koushanfar, G. Qu, and M. Potkonjak. Intellectual property metering. In Information Hiding Workshop, pages 81-95, 2001.
6. J.W. Lee. L. Daihyun, B. Gassend, G.E. Suh, M. van Dijk, and S. Devadas. A technique to build a secret key in integrated circuits for identification and authentication applications. In Symposium of VLSI Circuits, pages 176-179, 2004.
7. K. Lofstrom, W.R. Daasch, and D. Taylor. IC identification circuits using device mismatch. In International Solid State Circuits Conference (ISSCC). pages 372-373, 2000.
8. S. Maeda, H. Kuriyama. T. Ipposhi, S. Maegawa. Y. Inoue. M. Inuishi, N. Kotani, and T. Nishimura. An artificial fingerprint device (AFD): a study of identification number applications utilizing characteristics variation of polycrystalline silicon TFTs. IEEE Trans. Electron Devices, 50(6): 1451-1458, 2003.
9. G. Qu and M. Potkonjak. Intellectual Property Protection in VLSI Design. Kluwer. 2003.
10. Y Su, J. Holleman, and B. Otis. A 1.6J/bit stable chip ID generating circuit using process variations. In ISSCC 2007, pages 406-407, 2007.
11. G.E. Suh. C.W. O'Donnell, I. Sachdev, and S. Devadas. Design and implementation of the AEGIS single-chip secure processor using physical random functions. In ISCA, pages 25-36, 2005.