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Volumn 50, Issue 6, 2003, Pages 1451-1458

An artificial fingerprint device (AFD): A study of identification number applications utilizing characteristics variation of polycrystalline silicon TFTs

Author keywords

Crystals; Identification; Random number generation; Silicon; Silicon on insulator technology; Thin film transistors

Indexed keywords

ARTIFICIAL INTELLIGENCE; PATTERN MATCHING; POLYSILICON; RANDOM NUMBER GENERATION; SILICON ON INSULATOR TECHNOLOGY; THIN FILM TRANSISTORS;

EID: 0041663673     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.808526     Document Type: Article
Times cited : (23)

References (8)
  • 1
    • 0035715859 scopus 로고    scopus 로고
    • An artificial fingerprint device (AFD) module using poly-Si thin film transistors with logic LSI compatible process for built-in security
    • S. Maeda, H. Kuriyama, T. Ipposhi, S. Maegawa, and M. Inuishi, "An Artificial Fingerprint Device (AFD) module using poly-Si thin film transistors with logic LSI compatible process for built-in security," in IEDM Tech. Dig., 2001, pp. 759-762.
    • (2001) IEDM Tech. Dig. , pp. 759-762
    • Maeda, S.1    Kuriyama, H.2    Ipposhi, T.3    Maegawa, S.4    Inuishi, M.5
  • 2
    • 0016597193 scopus 로고
    • The electrical properties of polycrystalline silicon film
    • J. Y. W. Seto, "The electrical properties of polycrystalline silicon film," J. Appl. Phys., vol. 46, pp. 5247-5254, 1975.
    • (1975) J. Appl. Phys. , vol.46 , pp. 5247-5254
    • Seto, J.Y.W.1
  • 3
    • 0020796133 scopus 로고
    • Effects of grain boundaries on the channel conductance of SOI MOSFET's
    • J. G. Possum and A. O. Conde, "Effects of grain boundaries on the channel conductance of SOI MOSFET's," IEEE Trans. Electron Devices, vol. ED-30, pp. 933-940, 1983.
    • (1983) IEEE Trans. Electron Devices , vol.ED-30 , pp. 933-940
    • Possum, J.G.1    Conde, A.O.2
  • 5
    • 0034428343 scopus 로고    scopus 로고
    • IC identification circuit using device mismatch
    • K. Lofstrom, W. R. Daasch, and D. Taylor, "IC identification circuit using device mismatch," in Tech. Dig. ISSCC, 2000, pp. 372-373.
    • (2000) Tech. Dig. ISSCC , pp. 372-373
    • Lofstrom, K.1    Daasch, W.R.2    Taylor, D.3
  • 6
    • 0025955121 scopus 로고
    • Polysilicon thin-film transistors with channel length and width comparable to or smaller than the grain size of the thin film
    • N. Yamauchi, J.-J. J. Hajjar, and R. Reif, "Polysilicon thin-film transistors with channel length and width comparable to or smaller than the grain size of the thin film," IEEE Trans. Electron Devices, vol. 38, pp. 55-60, 1991.
    • (1991) IEEE Trans. Electron Devices , vol.38 , pp. 55-60
    • Yamauchi, N.1    Hajjar, J.-J.J.2    Reif, R.3
  • 7
    • 36549098234 scopus 로고
    • 2: Temperature dependence of the crystallization parameters
    • 2: Temperature dependence of the crystallization parameters," J. Appl. Phys., vol. 62, pp. 1675-1681, 1987.
    • (1987) J. Appl. Phys. , vol.62 , pp. 1675-1681
    • Iverson, R.B.1    Reif, R.2
  • 8
    • 0031647690 scopus 로고    scopus 로고
    • An analytical method of evaluating variation of the threshold voltage shift caused by the negative-bias temperature stress in poly-Si TFTs
    • S. Maeda, S. Maegawa, T. Ipposhi, H. Kuriyama, M. Ashida, Y. Inoue, H. Miyoshi, and A. Yasuoka, "An analytical method of evaluating variation of the threshold voltage shift caused by the negative-bias temperature stress in poly-Si TFTs," IEEE Trans. Electron Devices, vol. 45, pp. 165-172, 1998.
    • (1998) IEEE Trans. Electron Devices , vol.45 , pp. 165-172
    • Maeda, S.1    Maegawa, S.2    Ipposhi, T.3    Kuriyama, H.4    Ashida, M.5    Inoue, Y.6    Miyoshi, H.7    Yasuoka, A.8


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.