A digital frequency synthesizer for cognitive radio spectrum sensing applications

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2009, Pages 423-426

  Rapinoja, Tapio ^a   Stadius, Kari ^a   Xu, Liangge ^a   Lindfors, Saska ^b   Kaunisto, Risto ^c   Pärssinen, Aarno ^c   Ryynänen, Jussi ^a  

^a AALTO UNIVERSITY   (Finland)

^b TEXAS INSTRUMENTS   (United States)

^c NOKIA RESEARCH CENTER   (United States)

Author keywords

Cognitive radio; Digital frequency synthesis; Spectrum sensing

Indexed keywords

ACTIVE AREA; ARBITRARY FREQUENCIES; CMOS PROCESSS; COGNITIVE RADIO; DIGITAL FREQUENCY SYNTHESIS; DIGITAL FREQUENCY SYNTHESIZER; EXTREMELY HIGH FREQUENCIES; FREQUENCY RANGES; FREQUENCY RESOLUTIONS; LOW POWER; OPERATIONAL BANDWIDTH; POWER CONSUMPTION; SETTLING TIME; SPECTRUM SENSING; WIDE-BAND;

DIGITAL INTEGRATED CIRCUITS; DIGITAL RADIO; FREQUENCY SYNTHESIZERS; INTEGRATED CIRCUITS; RADIO WAVES;

RADIO;

EID: 70350228513     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2009.5135572     Document Type: Conference Paper

References (7)

1. S. Haykin, "Cognitive radio: brain-empowered wireless communications", IEEE J. on Selected Areas in Communications, vol. 23, no. 2, pp. 201-220, Feb. 2005.
2. J. Lunden, V. Koivunen, A. Huttunent, H. V. Poort, "Spectrum Sensing in Cognitive Radios Based on Multiple Cyclic Frequencies", Proc. of CrownCom 2007, pp. 37-43, Aug. 2007.
3. H. Mair, L. Xiu, "An Architecture of High-Performance Frequency and Phase Synthesis", IEEE J. of Solid-State Circuits, vol. 35, no. 6, pp. 835-846, June 2000.
4. D.E. Calbaza, Y.Savaria, "A Direct Digital Period Synthesis Circuit", IEEE J. of Solid-State Circuits, vol. 37, no. 8, pp. 1039-1045, Aug. 2002.
5. O. Susplugas, P. Philippe, "Multimode clock generation using delay-locked loop", Electronic Letters, vol. 39, no. 4, pp. 347-349, Feb. 2003.
6. S.-J. Bae, H.-J. Chi, H.-R. Kim, H.-J. Park, "A 3Gb/s 8b Single-Ended Trasceiver for 4-Drop DRAM Interface with Digital Calibration of Equalization Skew and Offset Coefficients", Proc. of ISSCC 2005, pp. 520-521 and 614, Feb. 2005.
7. K. Kimura, H. Asazawa, "Frequency Mixer with a Frequency Doubler for Integrated Circuits", IEEE J. of Solid-State Circuits, vol. 29, no. 9, pp. 1133-1137, Sept. 1994.