System-level power/performance evaluation of 3D stacked DRAMs for mobile applications

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2009, Pages 923-928

  Facchini, Marco ^a,b   Carlson, Trevor ^a   Vignon, Anselme ^b   Palkovic, Martin ^a   Catthoor, Francky ^a   Dehaene, Wim ^b   Benini, Luca ^c   Marchal, Paul ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTER CIRCUITS; DYNAMIC RANDOM ACCESS STORAGE; ELECTRONICS PACKAGING; GREEN COMPUTING; MEMORY ARCHITECTURE; MOBILE COMPUTING; RADIO TRANSCEIVERS;

CONSUMER APPLICATIONS; INDUSTRIAL PROCESSS; INTERCONNECT DENSITIES; MEMORY BOTTLENECK; MEMORY REQUIREMENTS; MOBILE APPLICATIONS; TECHNOLOGY OPTIONS; THROUGH-SILICON-VIA (TSV);

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 70350055197     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2009.5090797     Document Type: Conference Paper

References (18)

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