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Volumn , Issue , 2009, Pages 479-485

3D system integration technology and 3D systems

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; 3-D SYSTEM INTEGRATION; 3D SYSTEMS; KEY TECHNOLOGIES; LSI CHIPS; ON-WAFER; SELF ASSEMBLY PROCESS; SUPER CHIP INTEGRATION; THROUGH-SI VIA;

EID: 70349952024     PISSN: 15401766     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (5)

References (12)
  • 10
    • 33646909559 scopus 로고    scopus 로고
    • New Three-Dimensional Integration Technology Using Self-Assembly Technique
    • T. Fukushima, Y. Yamada, H. Kikuchi, and M. Koyanagi, "New Three-Dimensional Integration Technology Using Self-Assembly Technique," IEDM Tech. Dig., pp.359-362, 2005.
    • (2005) IEDM Tech. Dig , pp. 359-362
    • Fukushima, T.1    Yamada, Y.2    Kikuchi, H.3    Koyanagi, M.4
  • 11
    • 50249183988 scopus 로고    scopus 로고
    • T. Fukushima, Y. Yamada, H. Kikuchi, T. Konno, J. Liang, A. M. Ali, K. Sasaki, K. Inamura, T. Tanaka, and M. Koyanagi, New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique, JEDM Tech. Dig., pp. 985-988, 2007.
    • T. Fukushima, Y. Yamada, H. Kikuchi, T. Konno, J. Liang, A. M. Ali, K. Sasaki, K. Inamura, T. Tanaka, and M. Koyanagi, "New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique, JEDM Tech. Dig., pp. 985-988, 2007.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.