A low-power dual-clock strategy for digital circuits of EPC Gen2 RFID tag

2009 IEEE International Conference on RFID, RFID 2009

Volumn , Issue , 2009, Pages 7-14

  Qiasi, Luo ^a   Li, Guo ^a   Li, Qing ^b   Zhang, Gang ^b   Wang, Junyu ^b  

^a UNIVERSITY OF SCIENCE AND TECHNOLOGY OF CHINA   (China)

^b FUDAN UNIVERSITY   (China)

Author keywords

Backscatter frequency; Clock strategy; EPC Gen2; Protocol conformance; RFID

Indexed keywords

BACKSCATTER FREQUENCY; EPC GEN2; LOW POWER; M-TECHNOLOGIES; POWER CONSUMPTION; PROTOCOL CONFORMANCE; RF-ID TAGS; RFID; SYSTEM CLOCK;

BACKSCATTERING; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; RADIO NAVIGATION;

CLOCKS;

EID: 70349298952     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFID.2009.4911177     Document Type: Conference Paper

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