Improvement of EUVL mask blank inspection capability at Intel

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7379, Issue , 2009, Pages

  Ma, Andy ^a   Liang, Ted ^a   Park, Seh Jin ^a   Zhang, Guojing ^a   Tamura, Tomoya ^b   Omata, Kazunori ^b   Sato, Yuta ^b   Kusunose, Hal ^b  

^a INTEL CORPORATION   (United States)

^b Yokohama shi   (Japan)

Author keywords

EUV Lithography; EUV mask blank inspection

Indexed keywords

DEFECT FREE MASK; DEFECT INSPECTION; DEFECT LEVELS; EUV LITHOGRAPHY; EUV MASK; EUV MASK BLANK INSPECTION; EUVL MASK BLANKS; HIGH-VOLUME PRODUCTION; INTEL CORPORATIONS; LEADING TECHNOLOGY; MASK BLANK; MASK BLANK INSPECTION; MASK MAKERS; OPTICAL LITHOGRAPHY; PERFORMANCE IMPROVEMENTS; PHASE I; PILOT LINE; PROCESS DEVELOPMENT; QUARTZ SUBSTRATE;

DEFECTS; INSPECTION; LITHOGRAPHY; OXIDE MINERALS; PHOTOMASKS; QUARTZ; SUBSTRATES; ULTRAVIOLET DEVICES;

EXTREME ULTRAVIOLET LITHOGRAPHY;

EID: 69949144627     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.824259     Document Type: Conference Paper

References (13)

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