An introduction to high-level synthesis

IEEE Design and Test of Computers

Volumn 26, Issue 4, 2009, Pages 8-17

  Coussy, Philippe ^a   Gajski, Daniel D ^b   Meredith, Michael ^c   Takach, Andres ^d  

^a UNIVERSITÉ DE BRETAGNE SUD   (France)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Forte Design Systems   (United States)

^d MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

Architectures; Custom processors; Design and test; Hardware; Hardware synthesis and verification; High level synthesis; Memory management; Multiplexing; Registers; Resource management; RTL abstraction; Software

Indexed keywords

CUSTOM PROCESSORS; HARDWARE SYNTHESIS AND VERIFICATION; HIGH-LEVEL SYNTHESIS; MEMORY MANAGEMENT; REGISTERS; RESOURCE MANAGEMENT; RTL ABSTRACTION; SOFTWARE;

ABSTRACTING; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; MULTIPLEXING; NATURAL RESOURCES MANAGEMENT; RESOURCE ALLOCATION; VERIFICATION;

HARDWARE;

EID: 69949114796     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2009.69     Document Type: Review

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