A code refinement methodology for performance- improved synthesis from C

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2006, Pages 716-723

  Stitt, Greg ^a   Vahid, Frank ^a,b   Najjar, Walid ^a  

^a University of California Riverside   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Code refinement; Coding guidelines; Compilation; Embedded systems; FPGA; Hardware software partitioning; Synthesis

Indexed keywords

COMPUTER-AIDED DESIGN; CRITICAL PARTS; EMBEDDED BENCHMARKS; HARDWARE PERFORMANCE; HARDWARE SYNTHESIS; INTERNATIONAL CONFERENCES; LANGUAGES (TRADITIONAL); LINES OF CODE (LOC); SOFTWARE DEVELOPERS; SOFTWARE PROGRAMMING; SOFTWARE SIZES; SYNTHESIS (OF CHIRAL IONIC LIQUIDS); SYNTHESIS TOOLS;

BENCHMARKING; C (PROGRAMMING LANGUAGE); CODES (STANDARDS); CODES (SYMBOLS); COMPUTER SOFTWARE; DESIGN; HARDWARE; PROGRAMMING THEORY;

COMPUTER HARDWARE;

EID: 46149096003     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320018     Document Type: Conference Paper

References (17)

1. Böhm, W., Hammes, J., Draper, B., Chawathe, M., Ross, C., Rinker, R., and Najjar, W. Mapping a single assignment programming language to reconfigurable systems. The Journal of Supercomputing, Vol. 21, 2002, 117-130.
2. CatapultC. http://www.mentor.com/products/c-based_design/
3. Coding guidelines for datapath synthesis. www.synopsys.com/products/ designware/ dwtb/articles/coding_guidelines/coding_guidelines.html
4. Gokhale, M.B. and Stone, J.M. NAPA C: compiling for a hybrid RISC/FPGA architecture. In proceedings of IEEE symposium on FPGAs for custom computing machines (FCCM), 1998, 126-135.
5. Gupta, S., Dutt, N., Gupta, R., and Nicolau, A. SPARK: a high-level synthesis framework for applying parallelizing compiler transformations. In proceeding of international conference on VLSI Design, 2003, 461-466.
6. Fin, A., Fummi, F., and Signoretto, M. SystemC: a homogenous environment to test embedded systems. In proceedings of the international symposium on hardware/software codesign (CODES), 2001, 17-22.
7. Frigo, J., Gokhale, M., and Lavenier, D. Evaluation of the streams-C C-to-FPGA compiler: an applications perspective. In proceedings of the international symposium on field programmable gate arrays (FPGA), 2001, 134-140.
8. Kalavade, A. and Lee, E. A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem. In proceedings of the international symposium on hardware/software codesign (CODES), 1994, 42-48.
9. Ku, D. and DeMicheli, G. HardwareC - a language for hardware design (version 2.0). Technical Report: CSL-TR-90-419, Stanford University, 1990.
10. Lee, C., Potkonjak, M., and Mangione-Smith, W. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems. In proceedings of international symposium on microarchitecture (MICRO), 1997, 330-335.
11. Malik, A., Moyer, B., and Cermak, D. A low power unified cache architecture providing power and performance flexibility. In proceedings of international symposium on low power electronics and design (ISLPED), 2000, 241-243.
12. Najjar, W., Böhm, W., Draper, B., Hammes, J., Rinker, R., Beveridge, R., Chawathe, M., and Ross, C. From algorithms to hardware - a high-level language abstraction for reconfigurable computing. IEEE Computer, Vol. 36, Issue 8, August 2003, 63-69.
13. OXFORD Hardware Compilation Group, The Handel language, Technical Report, Oxford University, 1997.
14. Roy, S. and Banerjee, P. High-level techniques for signal processing: an algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. In proceedings of the design automation conference (DAC), 2004.
15. Séméria, L. and De Micheli, G. SpC: synthesis of pointers in C. In proceedings of the international conference on computer-aided design (ICCAD), 1998, 8-12.
16. Stitt, G. and Vahid, F. New decompilation techniques for binary-level co-processor generation. In proceedings of the international conference on computer-aided design (ICCAD), 2005.
17. Stitt, G., Vahid, F., McGregor, G., and Einloth, B. Hardware/software partitioning of software binaries: a case study of h.264 decode. In proceedings of international conference on hardware/software codesign and system synthesis (CODES/ISSS), 2005, 285-290.