Arithmetic circuits of redundant SUT-RNS

IEEE Transactions on Instrumentation and Measurement

Volumn 58, Issue 9, 2009, Pages 2959-2968

  Timarchi, Somayeh ^a   Navi, Keivan ^a  

^a SHAHID BEHESHTI UNIVERSITY   (Iran)

Author keywords

Carry free computations; Power delay product (PDP); Redundant residue number system (RNS); Signed digit (SD) number system; Stored unibit transfer (SUT) representation; SUT multiplier; VLSI

Indexed keywords

CARRY-FREE COMPUTATIONS; POWER-DELAY-PRODUCT (PDP); REDUNDANT RESIDUE NUMBER SYSTEM (RNS); SIGNED-DIGIT (SD) NUMBER SYSTEM; STORED-UNIBIT-TRANSFER (SUT) REPRESENTATION; SUT MULTIPLIER; VLSI;

DIFFUSERS (OPTICAL); DIGITAL DEVICES; FLIP FLOP CIRCUITS; FREQUENCY MULTIPLYING CIRCUITS;

MULTIPLYING CIRCUITS;

EID: 69249213624     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2009.2016793     Document Type: Article

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