High performance and energy efficient serial prefetch architecture

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2327 LNCS, Issue , 2002, Pages 146-159

  Reinman, Glenn ^a   Calder, Brad ^b   Austin, Todd ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BATTERY LIFE; BRANCH PREDICTION; CACHE BLOCKS; CACHE MISS; DATA COMPONENTS; ENERGY EFFICIENT; ENERGY-EFFICIENT ARCHITECTURES; FETCH BANDWIDTH; INSTRUCTION CACHES; INSTRUCTION PREFETCHING; LOOKUPS; LOW ENERGIES; MEMORY HIERARCHY; MICROPROCESSOR DESIGNS; MOBILE COMPUTERS; PREFETCHES; PREFETCHING;

CACHE MEMORY; COMPUTER ARCHITECTURE; ENERGY EFFICIENCY; MEMORY ARCHITECTURE;

ARCHITECTURAL DESIGN; ENERGY EFFICIENCY;

EID: 68749118218     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-47847-7_14     Document Type: Conference Paper

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