A 4GHz Low Complexity ADPLL-based Frequency Synthesizer in 90nm CMOS

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007

Volumn , Issue , 2007, Pages 543-546

  Zhuang, Jingcheng ^a   Du, Qingjin ^a   Kwasniewski, Tad ^a  

^a CARLETON UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUITS; PHASE LOCKED LOOPS;

DECISION CIRCUIT; DIGITAL PHASE AND FREQUENCY DETECTORS; HARDWARE COMPLEXITY; HIGH COMPLEXITY; HIGH FREQUENCY RESOLUTION; IN-BAND PHASE NOISE; LOOP BANDWIDTH; NON LINEAR;

FREQUENCY SYNTHESIZERS;

EID: 68549092112     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2007.4405790     Document Type: Conference Paper

References (7)

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