Test data volume comparison: Monolithic vs. modular SoC testing

IEEE Design and Test of Computers

Volumn 26, Issue 3, 2009, Pages 25-37

  Sinanoglu, Ozgur ^a   Sehgal, Anuja ^b   Marinissen, Erik Jan ^c   Fitzgerald, Jeff ^d   Rearick, Jeff ^d  

^a KUWAIT UNIVERSITY   (Kuwait)

^b NVIDIA   (United States)

^c IMEC   (United States)

^d ADVANCED MICRO DEVICES   (United States)

Author keywords

Automatic test pattern generation; Computer architecture; Flip flops; IEEE Std 1500; Logic cores; Magnetic cores; Modular testing; Monolithic testing; Pediatrics; SoC testing; System on a chip; Test application time; Test data volume

Indexed keywords

FLIP-FLOPS; IEEE STD 1500; LOGIC CORES; MODULAR TESTING; MONOLITHIC TESTING; SOC TESTING; SYSTEM-ON-A-CHIP; TEST APPLICATION TIME; TEST DATA VOLUME;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ARCHITECTURAL DESIGN; COMPUTER ARCHITECTURE; COMPUTER TESTING; COMPUTERS; DATA COMPRESSION; FLIP FLOP CIRCUITS; MAGNETIC CIRCUITS; MAGNETIC CORES; MAGNETIC DEVICES; MICROPROCESSOR CHIPS; PEDIATRICS; PROGRAMMABLE LOGIC CONTROLLERS; TEST FACILITIES; TESTING;

AUTOMATIC TEST PATTERN GENERATION;

EID: 68349146233     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2009.65     Document Type: Article

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