Vertical-Si-Nanowire SONOS memory for ultrahigh-density application

IEEE Electron Device Letters

Volumn 30, Issue 8, 2009, Pages 879-881

  Chen, Mingcong ^a   Yu, Hong Yu ^a   Singh, Navab ^a   Sun, Yuan ^b   Shen, Nan Sheng ^a   Yuan, Xiaohong ^b   Lo, Guo Qiang ^a   Kwong, Dim Lee ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

3 D Flash memory; Gate all around (GAA); Vertical silicon nanowire (SiNW)

Indexed keywords

3-D FLASH MEMORY; BUILDING BLOCKES; CMOS-COMPATIBLE TECHNOLOGY; GATE ALL AROUND (GAA); GATE STACKS; GATE-ALL-AROUND; MULTILEVEL MEMORY; PROGRAM/ERASE; SI NANOWIRE; SONOS FLASH MEMORY; SONOS MEMORY; ULTRAHIGH DENSITY; VERTICAL SILICON NANOWIRE (SINW);

GALLIUM ALLOYS; NANOWIRES; SILICON COMPOUNDS; SILICON OXIDES; THREE DIMENSIONAL; WINDOWS;

FLASH MEMORY;

EID: 68349116131     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2009.2024442     Document Type: Article

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