A model of electrical conduction across the grain boundaries in polycrystalline-silicon thin film transistors and metal oxide semiconductor field effect transistors

Journal of Applied Physics

Volumn 106, Issue 2, 2009, Pages

  Sharma, Kiran ^a   Joshi, D P ^b  

^a GRAPHIC ERA UNIVERSITY   (India)

^b DBS Post Graduate College Dehradun   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CONDUCTION MECHANISM; CONDUCTION MODELS; DISTRIBUTION PARAMETERS; DOPING DENSITIES; EFFECTIVE MOBILITIES; ELECTRICAL CONDUCTION; EXPERIMENTAL DATA; GATE BIAS VOLTAGE; GAUSSIAN ENERGY DISTRIBUTION; GB INTERFACE; GRAIN SIZE; METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS; N-CHANNEL; OUTPUT CHARACTERISTICS; POLY-CRYSTALLINE SILICON; POLYCRYSTALLINE; SCATTERING EFFECTS; SCATTERING POTENTIALS; SILICON THIN FILM TRANSISTORS; STRONG INVERSION; THEORETICAL INVESTIGATIONS;

DRAIN CURRENT; ELECTRIC POTENTIAL; GRAIN BOUNDARIES; GRAIN SIZE AND SHAPE; METALLIC COMPOUNDS; MOS DEVICES; POLYSILICON; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR INSULATOR BOUNDARIES; SEMICONDUCTOR METAL BOUNDARIES; THIN FILM TRANSISTORS; THIN FILMS;

FIELD EFFECT TRANSISTORS;

EID: 68249136934     PISSN: 00218979     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.3173179     Document Type: Article

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